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25C160T-ESN Datasheet

  • 25C160T-ESN

  • EEPROM

  • 20頁

  • ETC

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M
Part
Number
25AA160
25LC160
25C160
V
CC
Range
1.8 - 5.5V
2.5 - 5.5V
4.5 - 5.5V
25AA160/25LC160/25C160
DESCRIPTION
Temp
Ranges
I
I
I,E
The Microchip Technology Inc. 25AA160/25LC160/
25C160 (25XX160
*
) are 16 Kbit Serial Electrically
Erasable PROMs. The memory is accessed via a sim-
ple Serial Peripheral Interface鈩?(SPI鈩? compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a chip
select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
chip select, allowing the host to service higher priority
interrupts.
16K SPI
鈩?/div>
Bus Serial EEPROM
DEVICE SELECTION TABLE
Max Clock
Frequency
1 MHz
2 MHz
3 MHz
FEATURES
鈥?Low power CMOS technology
- Write current: 3 mA maximum
- Read current: 500
碌A
typical
- Standby current: 500 nA typical
鈥?2048 x 8-bit organization
鈥?16 byte page
鈥?Write cycle time: 5 ms max.
鈥?Self-timed ERASE and WRITE cycles
鈥?Block write protection
- Protect none, 1/4, 1/2 or all of array
鈥?Built-in write protection
- Power on/off data protection circuitry
- Write enable latch
- Write protect pin
鈥?Sequential read
鈥?High reliability
- Endurance: 1 M cycles
- Data retention: > 200 years
- ESD protection: > 4000V
鈥?8-pin PDIP and SOIC packages
鈥?Temperature ranges supported:
- Industrial (I):
- Automotive (E) (25C160):
-40擄C to +85擄C
-40擄C to +125擄C
PACKAGE TYPES
PDIP/SOIC
CS
SO
WP
V
SS
1
25XX160
2
3
4
8
7
6
5
V
CC
HOLD
SCK
SI
BLOCK DIAGRAM
Status
Register
HV Generator
I/O Control
Logic
Memory
Control
Logic
X
Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
V
CC
V
SS
*25XX160 is used in this document as a generic part number for the 25AA160/25LC160/25C160 devices.
SPI鈩?is a trademark of Motorola Inc.
Y Decoder
Sense Amp.
R/W Control
錚?/div>
2001 Microchip Technology Inc.
DS21231C-page 1

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