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24LC62-ST Datasheet

  • 24LC62-ST

  • 1K/2K Software Addressable I 2 C ⑩ Serial EEPROM

  • 220.53KB

  • 16頁(yè)

  • MICROCHIP   MICROCHIP

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M
Device
24LCS61
24LCS62
Array
Size
1K bits
2K bits
24LCS61/24LCS62
PACKAGE TYPES
Software
Write
Protection
Entire Array
Lower Half
PDIP
1K/2K Software Addressable I
2
C
鈩?/div>
Serial EEPROM
PRODUCT OFFERING
Voltage
Range
2.5V-5.5V
2.5V-5.5V
NC
NC
EDS
Vss
1
24LCS61/62
2
3
4
8
7
6
5
Vcc
NC
SCL
SDA
FEATURES
鈥?Low power CMOS technology
- 1 mA active current typical
- 10
碌
A standby current typical at 5.5V
鈥?Software addressability allows up to 255 devices
on the same bus
鈥?2-wire serial interface bus, I
2
C compatible
鈥?Automatic bus arbitration
鈥?Wakes up to control code 0110
鈥?General purpose output pin can be used to
enable other circuitry
鈥?100 kHz and 400 kHz compatibility
鈥?Page-write buffer for up to 16 bytes
鈥?10 ms max write cycle time for byte or page write
鈥?10,000,000 erase/write cycles guaranteed
鈥?8-pin PDIP, SOIC or TSSOP packages
鈥?Temperature ranges supported:
- Commercial (C):
0
擄
C to +70
擄
C
- Industrial (I):
-40
擄
C to +85
擄
C
SOIC
NC
NC
EDS
Vss
1
2
3
4
8
7
6
5
V
CC
NC
SCL
SDA
24LCS61/62
TSSOP
24LCS61/62
NC
NC
EDS
V
SS
1
2
3
4
8
7
6
5
Vcc
NC
SCL
SDA
DESCRIPTION
The Microchip Technology Inc. 24LCS61/62 is a 1K/2K
bit Serial EEPROM developed for applications that
require many devices on the same bus but do not have
the I/O pins required to address each one individually.
These devices contain an 8 bit address register that is
set upon power-up and allows the connection of up to
255 devices on the same bus. When the process of
assigning ID values to each device is in progress, the
device will automatically handle bus arbitration if more
than one device is operating on the bus. In addition, an
external open drain output pin is available that can be
used to enable other circuitry associated with each
individual system. Low current design permits opera-
tion with typical standby and active currents of only
10
碌
A and 1 mA respectively. The device has a page-
write capability for up to 16 bytes of data. The device is
available in the standard 8-pin PDIP, SOIC (150 mil),
and TSSOP packages.
I
2
C is a trademark of Philips Corporation.
BLOCK DIAGRAM
EDS
HV Generator
Memory
Control
Logic
I/O
Control
Logic
XDEC
EEPROM
Array
ID Register
Serial Number
SDA SCL
Vcc
Vss
YDEC
SENSE AMP
R/W CONTROL
漏
1997 Microchip Technology Inc.
Preliminary
DS21226A-page 1

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