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24LC41A Datasheet

  • 24LC41A

  • 24LC41A Datasheet

  • 18頁

  • ETC

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24LC41A
1K/4K 2.5V Dual Mode, Dual Port I
2
C鈩?Serial EEPROM
Features
鈥?Single supply with operation down to 2.5V
鈥?Completely implements DDC1錚?DDC2錚?interface
for monitor identification, including recovery to
DDC1
鈥?Improved noise immunity
鈥?Separate high speed 2-wire bus for
microcontroller access to 4K-bit Serial EEPROM
鈥?Low-power CMOS technology
鈥?2 mA active current typical
鈥?20
碌A
standby current typical at 5.5V
鈥?Dual 2-wire serial interface bus, I
2
C
鈩?/div>
compatible
鈥?Hardware write-protect for Microcontroller Access
Port
鈥?Self-timed write cycle (including auto-erase)
鈥?Page write buffer for up to 8 bytes (DDC port) or
16 bytes (4K Port)
鈥?100 kHz (2.5V) and 400 kHz (5V) compatibility
鈥?1,000,000 erase/write cycles
鈥?Data retention > 40 years
鈥?8-pin PDIP package
鈥?Available for extended temperature ranges
- Commercial (C):
0擄C to
+70擄C
- Industrial (I):
-40擄C to
+85擄C
The 4K-bit microcontroller port is completely indepen-
dent of the DDC port, therefore, it can be accessed
continuously by a microcontroller without interrupting
DDC transmission activity. The 24LC41A is available in
a standard 8-pin PDIP package in both commercial and
industrial temperature ranges.
Package Type
PDIP
DSCL
VCLK
V
SS
MSDA
1
8
DSDA
Vcc
MWP
MSCL
24LC41A
2
3
4
7
6
5
Block Diagram
DDC Monitor Port
DSDA
EDID Table
1K-Bit
VCLK
DSCL
Microcontroller Access Port
MSDA
4K-Bit
Serial
EEPROM
Description
The Microchip Technology Inc. 24LC41A is a dual port
128 x 8 and 512 x 8-bit Electrically Erasable PROM
(EEPROM). This device is designed for use in applica-
tions requiring storage and serial transmission of
configuration and control information. Three modes of
operation have been implemented:
鈥?Transmit-only mode for the DDC Monitor Port
鈥?Bidirectional mode for the DDC Monitor Port
鈥?Bidirectional, industry-standard 2-wire bus for the
4K Microcontroller Access Port
Upon power-up, the DDC Monitor Port will be in the
Transmit-only mode, repeatedly sending a serial bit
stream of the entire memory array contents, clocked by
the VCLK pin. A valid high-to-low transition on the
DSCL pin will cause the device to enter the transition
mode, an look for a valid control byte on the I
2
C bus. If
it detects a valid control byte from the master, it will
switch to Bidirectional mode, with byte selectable read/
write capability of the memory array using DSCL. If no
control byte is received, the device will revert to the
Transmit-only mode after it received 128 consecutive
VCLK Package Type pulses while the DSCL pin is idle.
MSCL
Pin Function Table
Name
DSCL
DSDA
VCLK
MSCL
MSDA
MWP
V
SS
V
CC
Function
Serial Clock for DDC Bidirectional mode
(DDC2)
Serial Address and Data I/O(DDC Bus)
Serial Clock for DDC Transmit-only mode
(DDC1)
Serial clock for 4K-bit MCU port
Serial Address and Data I/O for 4K-bit MCU port
Hardware write-protect for Microcontroller
Access Port
Ground
+2.5V to +5.5V power supply
I
2
C is a trademark of Philips Corporation.
DDC is a trademark of Video Electronics Standards Association.
錚?/div>
2003 Microchip Technology Inc.
DS21176D-page 1

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