鈩?/div>
compatible
鈥?Functional address inputs for cascading up to 8
devices
鈥?Schmitt trigger, 鏗乴tered inputs for noise suppres-
sion
鈥?Output slope control to eliminate ground bounce
鈥?100 kHz (1.8V) and 400 kHz (5V) compatibility
鈥?Self-timed write cycle (including auto-erase)
鈥?Page-write buffer for up to 16 bytes
鈥?2 ms typical write cycle time for page-write
鈥?Hardware write protect for entire memory
鈥?Can be operated as a serial ROM
鈥?Factory programming (QTP) available
鈥?ESD protection > 4,000V
鈥?1,000,000 Erase/Write cycles guaranteed
鈥?Data retention > 200 years
鈥?8-pin DIP, 8-lead SOIC packages
鈥?Available for commercial temperature range
- Commercial (C):
0擄C to +70擄C
PACKAGE TYPES
PDIP
A0
A1
A2
V
SS
1
24AA164
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
8-lead
SOIC
A0
A1
A2
V
SS
1
24AA164
8
7
6
5
V
CC
WP
SCL
SDA
2
3
4
DESCRIPTION
The Microchip Technology Inc. 24AA164 is a cascad-
able 16K bit Electrically Erasable PROM. The device is
organized as eight blocks of 256 x 8-bit memory with a
2-wire serial interface. Low voltage design permits
operation down to 1.8 volts (end-of-life voltage for most
popular battery technologies) with standby and active
currents of only 5
碌
A and 1 mA respectively. The
24AA164 also has a page-write capability for up to 16
bytes of data. The 24AA164 is available in the standard
8-pin DIP and 8-lead surface mount SOIC packages.
The three select pins, A0, A1, and A2, function as chip
select inputs and allow up to eight devices to share a
common bus, for up to 128K bits total system
EEPROM.
BLOCK DIAGRAM
A0
A1
A2
WP
HV GENERATOR
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
EEPROM ARRAY
(8 x 256 x 8)
PAGE LATCHES
SDA
SCL
YDEC
V
CC
V
SS
SENSE AMP
R/W CONTROL
I
2
C is a trademark of Philips Corporation.
漏
1999 Microchip Technology Inc.
DS21100F-page 1