< 2.5V.
鈥?/div>
100 kHz for E temperature range.
FEATURES
鈥?Low power CMOS technology
- Maximum write current 3 mA at 5.5V
- Maximum read current 400
碌
A at 5.5V
- Standby current 100 nA typical at 5.5V
鈥?2-wire serial interface bus, I
2
C compatible
鈥?Cascadable for up to eight devices
鈥?Self-timed ERASE/WRITE cycle
鈥?64-byte page-write mode available
鈥?5 ms max write-cycle time
鈥?Hardware write protect for entire array
鈥?Output slope control to eliminate ground bounce
鈥?Schmitt trigger inputs for noise suppression
鈥?1,000,000 erase/write cycles guaranteed
鈥?Electrostatic discharge protection > 4000V
鈥?Data retention > 200 years
鈥?8-pin PDIP and SOIC (150 and 208 mil) packages
鈥?14-pin TSSOP package
鈥?Temperature ranges:
- Industrial (I):
-40
擄
C to +85
擄
C
- Automotive (E):
-40
擄
C to +125
擄
C
SOIC
A0
A1
A2
V
SS
1
8
V
CC
WP
SCL
SDA
24xx128
2
3
4
7
6
5
TSSOP
A0
A1
NC
NC
NC
A2
Vss
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Vcc
WP
NC
NC
NC
SCL
SDA
24xx128
BLOCK DIAGRAM
A0鈥2
WP
HV GENERATOR
DESCRIPTION
The Microchip Technology Inc. 24AA128/24LC128
(24xx128*) is a 16K x 8 (128K bit) Serial Electrically
Erasable PROM, capable of operation across a broad
voltage range (1.8V to 5.5V). It has been developed for
advanced, low power applications such as personal
communications or data acquisition. This device also
has a page-write capability of up to 64 bytes of data.
This device is capable of both random and sequential
reads up to the 128K boundary. Functional address
lines allow up to eight devices on the same bus, for up
to 1M bit address space. This device is available in the
standard 8-pin plastic DIP, 8-pin SOIC (150 and
208 mil), and 14-pin TSSOP packages.
I/O
CONTROL
LOGIC
MEMORY
CONTROL
LOGIC
XDEC
EEPROM
ARRAY
PAGE LATCHES
I/O
SCL
YDEC
SDA
V
CC
V
SS
SENSE AMP
R/W CONTROL
I
2
C is a trademark of Philips Corporation.
*24xx128 is used in this document as a generic part number for the 24AA128/24LC128 devices.
漏
1998 Microchip Technology Inc.
DS21191B-page 1