AGP 3.0 compliant (8x transfer rate) bridge.
鈥?/div>
Device Features
HyperTransport technology tunnel with side A
and side B.
鈥?Side A is 16 bits (input and output); side B is
8 bits.
鈥?Either side may connect to the host or to a
downstream HyperTransport technology
compliant device.
鈥?Each side supports HyperTransport technol-
ogy-defined reduced bit widths: 8-bit, 4-bit,
and 2-bit.
鈥?Side A supports transfer rates of 1600, 1200,
800, and 400 mega-transfers per second.
Side B supports transfer rates of 800 and
400 mega-transfers per second.
鈥?Maximum bandwidth is 6.4 gigabytes per
second across side A (half upstream and half
downstream) and 1.6 gigabytes per second
across side B.
鈥?Independent transfer rate and bit width
selection for each side.
鈥?Link disconnect protocol supported.
鈥?/div>
AGP 8x bridge.
鈥?Compliance with AGP 3.0 specification sig-
naling, supporting 4x and 8x transfer rates.
鈥?Compliance with AGP 2.0 specification 1.5-
volt signaling, supporting 1x, 2x, and 4x
data-transfer modes.
鈥?Supports up to 32 outstanding requests.
31 x 31 millimeter, 564-ball BGA package.
1.5 volt AGP signaling; some 3.3 volt IO; 1.2
volt link signaling; 1.8 volt core.
鈥?/div>
鈥?/div>
AMD-8151
TM
Device
Host
HyperTransport
TM
Link
16 bits upstream,
16 bits downstream
Side A
tunnel
Side B
HyperTransport
Link
8 bits upstream,
8 bits downstream
Downstream
Device
AGP
Bridge
AGP Graphics
Controller
Figure 1: System block diagram.
1
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