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22003B Datasheet

  • 22003B

  • ?lanSC520 Data Sheet? 2.16MB (PDF)

  • 105頁(yè)

  • ETC

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PRELIMINARY
脡lan鈩C520 Microcontroller
Integrated 32-Bit Microcontroller with PC/AT-Compatible Peripherals,
PCI Host Bridge, and Synchronous DRAM Controller
DISTINCTIVE CHARACTERISTICS
s
Industry-standard Am5
x
86廬 CPU with floating
s
ROM/Flash controller for 8-, 16-, and 32-bit devices
s
Enhanced PC/AT-compatible peripherals
s
s
s
s
s
point unit (FPU) and 16-Kbyte write-back cache
鈥?100-MHz and 133-MHz operating frequencies
鈥?Low-voltage operation (core V
CC
= 2.5 V)
鈥?5-V tolerant I/O (3.3-V output levels)
E86鈩?family of x86 embedded processors
鈥?Part of a software-compatible family of
microprocessors and microcontrollers well
supported by a wide variety of development tools
Integrated PCI host bridge controller leverages
standard peripherals and software
鈥?33 MHz, 32-bit PCI bus Revision 2.2-compliant
鈥?High-throughput 132-Mbyte/s peak transfer
鈥?Supports up to five external PCI masters
鈥?Integrated write-posting and read-buffering for
high-throughput applications
Synchronous DRAM (SDRAM) controller
鈥?Supports 16-, 64-, 128-, and 256-Mbit SDRAM
鈥?Supports 4 banks for a total of 256 Mbytes
鈥?Error Correction Code provides system reliability
鈥?Buffers improve read and write performance
AMDebug鈩?technology offers a low-cost
solution for the advanced debugging
capabilities required by embedded designers
鈥?Allows instruction tracing during execution from
the Am5
x
86 CPU鈥檚 internal cache
鈥?Uses an enhanced JTAG port for low-cost debugging
鈥?Parallel debug port for high-speed data exchange
during in-circuit emulation
General-Purpose (GP) bus with programmable
timing for 8- and 16-bit devices provides good
performance at low cost
provide improved performance
鈥?Enhanced programmable interrupt controller
(PIC) prioritizes 22 interrupt levels (up to 15
external sources) with flexible routing
鈥?Enhanced DMA controller includes double buffer
chaining, extended address and transfer counts,
and flexible channel routing
鈥?Two 16550-compatible UARTs operate at baud
rates up to 1.15 Mbit/s with optional DMA interface
s
Standard PC/AT-compatible peripherals
鈥?Programmable interval timer (PIT)
鈥?Real-time clock (RTC) with battery backup
capability and 114 bytes of RAM
s
Additional integrated peripherals
鈥?Three general-purpose 16-bit timers provide
flexible cascading for 32-bit operation
鈥?Watchdog timer guards against runaway software
鈥?Software timer
鈥?Synchronous serial interface (SSI) offers
full-duplex or half-duplex operation
鈥?Flexible address decoding for programmable
memory and I/O mapping and system addressing
configuration
s
32 programmable input/output (PIO) pins
s
Native support for pSOS, QNX, RTXC, VxWorks,
and Windows
廬
CE operating systems
s
Industry-standard BIOS support
s
Plastic Ball Grid Array (PBGA388) package
GENERAL DESCRIPTION
The 脡lan鈩C520 microcontroller is a full-featured mi-
crocontroller developed for the general embedded
market. The 脡lanSC520 microcontroller combines a
32-bit, low-voltage Am5
x
86 CPU with a set of inte-
grated peripherals suitable for both real-time and PC/
AT-compatible embedded applications.
An integrated PCI host bridge, SDRAM controller, enhanced
PC/AT-compatible peripherals, and advanced debugging
features provide the system designer with a wide range of
on-chip resources, allowing support for legacy devices as
well as new devices available in the current PC marketplace.
漏 Copyright 2001 Advanced Micro Devices, Inc. All rights reserved.
Designed for medium- to high-performance applications
in the telecommunications, data communications, and
information appliance markets, the 脡lanSC520 micro-
controller is particularly well suited for applications re-
quiring high throughput combined with low latency. The
compact Plastic Ball Grid Array (PBGA) package pro-
vides a high degree of functionality in a very small form
factor, making it cost-effective for many applications. A
0.25-micron CMOS manufacturing process allows for
low power consumption along with high performance.
Final Draft#
22003
Rev:
B
Amendment/0
Issue Date:
March 2001

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