鈩?/div>
ER microcontrollers provide a major advancement in systems
integration by bringing 32 Kbyte of zero-wait-state RAM onto the microcontroller. This incorporation
of system-level RAM onto the controller brings the advantages of reduced system cost, reduced
power consumption, and smaller board size. With these advantages comes the challenge of utilizing
this new resource to the greatest advantage in a given system. This application note describes how
to use an internal chip select to access the internal RAM of the Am186ER controller, and the de-
bugging support provided by the processor for code or data located in this internal RAM. All refer-
ences in the document to the Am186ER apply equally to the Am188ER microcontroller.
OVERVIEW OF AM186ER CONTROLLER
The 80186 microcontroller and its derivative parts con-
tinue to be popular in embedded applications. AMD
has been a leader in the continuing development of the
186 with its Am186 product line. AMD鈥檚 most recent
addition to the Am186 family is the Am186ER micro-
controller. The Am186ER microcontroller is a direct de-
scendent of the popular Am186EM microcontroller,
which was introduced in 1994.
Like the Am186EM microcontroller, the Am186ER mi-
crocontroller provides 12 external chip-selects signals,
a demultiplexed address bus, 3 timers and a watchdog
timer, an asynchronous serial port, a synchronous se-
rial interface, 5 external interrupt pins, 2 DMA chan-
nels, and 32 programmable input/output pins. In
addition, the Am186ER provides 32 Kbyte of internal,
zero-wait-state RAM, and a 4x clock mode. The
Table 1.
Chip Select
Name
UCS
(Upper Chip
Select)
LCS
(Lower Chip
Select)
MCS
(Middle Chip
Selects)
PCS
(Peripheral
Chip Selects)
ICS
Am186ER microcontroller is available in speeds up to
40 MHz in a 100-pin PQFP or TQFP package at 3 V
with 5-V tolerant I/O.
MEMORY AND CHIP SELECT
CONFIGURATIONS
The internal RAM of the Am186ER microcontroller is
accessed via an internal chip select. The function of
this chip select is similar to the function of traditional
186 external chip selects. The use and configuration of
the internal RAM must take place within the context of
the total system. The final system configuration will be
heavily dependent on the need for external memory or
memory-mapped peripherals, and on the allocation of
the external chip selects to access these devices. The
chip select signals available on the Am186ER micro-
controller are summarized in Table 1.
Am186ER Microcontroller Chip Select Signals
Size (total for
all associated
signals)
64 Kbyte to
512 Kbyte
64 Kbyte to
512 Kbyte
8 Kbyte to
512 Kbyte
Normal Usage
ROM boot code
Number
of
Signals
1
Wait States
From 0 to 3
External Ready
Configurable to
use or ignore
external ready
Configurable to
use or ignore
external ready
Configurable to
use or ignore
external ready
Configurable to
use or ignore
external ready
Does not use
external ready
Comments
Ending address is always at
the top of memory (0xfffff)
Starting address is always at
the bottom of memory
(0x00000)
Base address must be
multiple of total block size
May be mapped to memory
or I/O space; PCS4 is not
available
Base address must be
multiple of 32 Kbyte; not
visible externally
RAM data
Slow memory or
memory mapped
peripherals
I/O or memory
mapped
peripherals
Internal RAM
1
From 0 to 3
4
From 0 to 3
6
1536 byte
PCS3-0 from 0 to 15
PCS6-5 from 0 to 3
1
32 Kbyte
0
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication#
21046
Rev:
A
Amendment/0
Issue Date:
September 1996
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