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11C90 Datasheet

  • 11C90

  • 650 MHz Prescalers

  • 10頁

  • NSC

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11C90 11C91 650 MHz Prescalers
Not Intended For New Designs
August 1992
11C90 11C91
650 MHz Prescalers
General Description
The 11C90 and 11C91 are high-speed prescalers designed
specifically for communication and instrumentation applica-
tions All discussions and examples in this data sheet are
applicable to the 11C91 as well as the 11C90
The 11C90 will divide by 10 or 11 and the 11C91 by 5 or 6
both over a frequency range from DC to typically 650 MHz
The division ratio is controlled by the Mode Control The
divide-by-10 or -11 capability allows the use of pulse swal-
lowing techniques to control high-speed counting modulos
by lower-speed circuits The 11C90 may be used with either
ECL or TTL power supplies
In addition to the ECL outputs Q and Q the 11C90 contains
an ECL-to-TTL converter and a TTL output The TTL output
operates from the same V
CC
and V
EE
levels as the counter
but a separate pin is used for the TTL circuit V
EE
This mini-
mizes noise coupling when the TTL output switches and
also allows power consumption to be reduced by leaving
the separate V
EE
pin open if the TTL output is not used
To facilitate capacitive coupling of the clock signal a 400X
resistor (V
REF
) is connected internally to the V
BB
reference
Connecting this resistor to the Clock Pulse input (CP) auto-
matically centers the input about the switching threshold
Maximum frequency operation is achieved with a 50% duty
cycle
Each of the Mode Control inputs is connected to an internal
2 kX resistor with the other end uncommitted (RM
1
and
RM
2
) An M input can be driven from a TTL circuit operating
from the same V
CC
by connecting the free end of the asso-
ciated 2 kX resistor to V
CCA
When an M input is driven
from the ECL circuit the 2 kX resistor can be left open or if
required can be connected to V
EE
to act as a pull-down
resistor
Logic Symbol
Connection Diagram
16-Pin DIP
TL F 9892 鈥?2
TL F 9892 鈥?1
Pin Names
CE
CP
M
n
MS
Q Q
QTTL
RM
n
V
REF
Description
Count Enable Input (Active LOW)
Clock Pulse Input
Count Modulus Control Input
Asynchronous Master Set Input
ECL Outputs
TTL Output
2 kX Resistor to M
n
400X Resistor to V
BB
C
1995 National Semiconductor Corporation
TL F 9892
RRD-B30M115 Printed in U S A

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