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100329F Datasheet

  • 100329F

  • Low Power Octal ECL/TTL Bidirectional Translator with Regist...

  • 11頁

  • NSC

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100329 Low Power Octal ECL/TTL Bidirectional Translator with Register
September 1999
100329
Low Power Octal ECL/TTL Bidirectional Translator with
Register
General Description
The 100329 is an octal registered bidirectional translator de-
signed to convert TTL logic levels to 100K ECL logic levels
and vice versa. The direction of the translation is determined
by the DIR input. A LOW on the output enable input (OE)
holds the ECL outputs in a cut-off state and the TTL outputs
at a high impedance level. The outputs change synchro-
nously with the rising edge of the clock input (CP) even
though only one output is enabled at the time.
The cut-off state is designed to be more negative than a nor-
mal ECL LOW level. This allows the output emitter-followers
to turn off when the termination supply is 鈭?.0V, presenting a
high impedance to the data bus. This high impedance re-
duces the termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100329 is designed with FAST
廬
TTL output buffers, fea-
turing optimal DC drive and capable of quickly charging and
discharging highly capacitive loads. All inputs have 50 k鈩?/div>
pull-down resistors.
Features
n
n
n
n
n
n
n
Bidirectional translation
ECL high impedance outputs
Registered outputs
FAST TTL outputs
TRI-STATE
廬
outputs
Voltage compensated operating range = 鈭?.2V to 鈭?.7V
Standard Microcircuit Drawing
(SMD) 5962-9206601
Connection Diagrams
24-Pin DIP
24-Pin Quad Cerpack
DS100306-4
DS100306-2
TRI-STATE
廬
is a registered trademark of National Semiconductor Corporation.
FAST
廬
is a registered trademark of Fairchild Semiconductor.
漏 1999 National Semiconductor Corporation
DS100306
www.national.com

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    Low Power Quint AND/NAND Gate
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