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100328SC Datasheet

  • 100328SC

  • Low Power Octal ECL/TTL Bi-Directional Translator with Latch

  • 14頁(yè)

  • FAIRCHILD

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100328 Low Power Octal ECL/TTL Bi-Directional Translator with Latch
April 1989
Revised August 2000
100328
Low Power Octal ECL/TTL Bi-Directional Translator
with Latch
General Description
The 100328 is an octal latched bi-directional translator
designed to convert TTL logic levels to 100K ECL logic lev-
els and vice versa. The direction of this translation is deter-
mined by the DIR input. A LOW on the output enable input
(OE) holds the ECL outputs in a cut-off state and the TTL
outputs at a high impedance level. A HIGH on the latch
enable input (LE) latches the data at both inputs even
though only one output is enabled at the time. A LOW on
LE makes the 100328 transparent.
The cut-off state is designed to be more negative than a
normal ECL LOW level. This allows the output emitter-fol-
lowers to turn off when the termination supply is
鈭?/div>
2.0V, pre-
senting a high impedance to the data bus. This high
impedance reduces termination power and prevents loss of
low state noise margin when several loads share the bus.
The 100328 is designed with FAST
錚?/div>
TTL output buffers,
featuring optimal DC drive and capable of quickly charging
and discharging highly capacitive loads. All inputs have
50 k
鈩?/div>
pull-down resistors.
Features
s
Identical performance to the 100128 at 50% of the
supply current
s
Bi-directional translation
s
2000V ESD protection
s
Latched outputs
s
FAST TTL outputs
s
3-STATE outputs
s
Voltage compensated operating range
= 鈭?/div>
4.2V to
鈭?/div>
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
100328SC
100328PC
100328QC
100328QI
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
鈭?/div>
40
擄
C to
+
85
擄
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
E
0
鈥揈
7
T
0
鈥揟
7
OE
LE
DIR
Description
ECL Data I/O
TTL Data I/O
Output Enable Input
Latch Enable Input
Direction Control Input
All pins function at 100K ECL levels except for T
0
鈥揟
7
.
FAST錚?is a registered trademark of Fairchild Semiconductor Corporation.
漏 2000 Fairchild Semiconductor Corporation
DS010219
www.fairchildsemi.com

100328SC 產(chǎn)品屬性

  • Fairchild Semiconductor

  • ECL to TTL or TTL to ECL

  • 5.4 ns

  • - 5.7 V, + 5.5 V

  • - 4.2 V, + 4.5 V

  • + 85 C

  • SMD/SMT

  • SOIC-24 Wide

  • 0 C

  • Rail

100328SC相關(guān)型號(hào)PDF文件下載

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    Low Power Quint AND/NAND Gate
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    Low Power Quint AND/NAND Gate
    NSC
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    Low Power Quint AND/NAND Gate
    NSC [Natio...
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    Low Power Quint AND/NAND Gate
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    Low Power Quint Exclusive OR/NOR Gate
    FAIRCHILD
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    Low Power Quint Exclusive OR/NOR Gate
    NSC

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