鈮?/div>
10
碌s)
Total Power Dissipation
Derate above 25擄C
Operating and Storage Temperature Range
Single Pulse Drain鈥搕o鈥揝ource Avalanche Energy 鈥?Starting TJ = 25擄C
(VDD = 100 Vdc, VGS =10 Vdc, IL = 3.0 Apk, L =10 mH, RG = 25
鈩?
Thermal Resistance
鈥?Junction to Case
鈥?Junction to Ambient, when surface mounted using minimum recommended pad size
Maximum Lead Temperature for Soldering Purposes, 1/8鈥?from case for 10 seconds
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
Value
500
500
鹵
20
鹵
40
1.0
0.8
3.0
40
0.32
鈥?55 to 150
45
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/擄C
擄C
mJ
擄C/W
R
胃JC
R
胃JA
TL
3.13
62.5
260
擄C
Designer鈥檚 Data for 鈥淲orst Case鈥?Conditions
鈥?The Designer鈥檚 Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves 鈥?representing boundaries on device characteristics 鈥?are given to facilitate 鈥渨orst case鈥?design.
E鈥揊ET and Designer鈥檚 are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 1
漏
Motorola TMOS
Motorola, Inc. 1995
Power MOSFET Transistor Device Data
1