鈥?/div>
I
DR
*
1.2A
1.5A
1.5A
I
DRM
8.0A
8.0A
8.0A
*
I
D
(continuous) is limited by max rated T
j
.
T
A
= 25擄C.
Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant P
D
increase possible on ceramic substrate.
Total for package.
Electrical Characteristics
(@ 25擄C unless otherwise specified)
Symbol
BV
DSS
V
GS(th)
鈭哣
GS(th)
I
GSS
I
DSS
Parameter
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Change in V
GS(th)
with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
Min
50
0.8
-4.3
1
2.4
-5.5
100
10
1
I
D(ON)
R
DS(ON)
ON-State Drain Current
Static Drain-to-Source
ON-State Resistance
TO-92 and P-DIP
SOT-89
TO-92 and P-DIP
SOT-89
鈭哛
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward Voltage Drop
Reverse Recovery Time
300
1.0
0.85
1.5
220
70
20
300
120
30
10
15
25
25
1.6
V
ns
V
GS
= 0V, I
SD
= 1.5A
V
GS
= 0V, I
SD
= 1A
ns
V
DD
= 25V
I
D
= 2A
R
GEN
= 10鈩?/div>
pF
V
GS
= 0V, V
DS
= 25V
f = 1 MHz
3.0
14
0.45
0.45
0.3
0.3
1.2
Typ
Max
Unit
V
V
mV/擄C
nA
碌A(chǔ)
mA
A
鈩?/div>
鈩?/div>
鈩?/div>
鈩?/div>
%/擄C
Conditions
V
GS
= 0V, I
D
= 10mA
V
GS
= V
DS
, I
D
= 10mA
V
GS
= V
DS
, I
D
= 10mA
V
GS
=
鹵20V,
V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125擄C
V
GS
= 10V, V
DS
= 5V
V
GS
= 4.5V, I
D
= 1.5A
V
GS
= 4.5V, I
D
= 0.75A
V
GS
= 10V, I
D
= 3A
V
GS
= 10V, I
D
= 1.5A
V
GS
= 10V, I
D
= 3A
V
DS
= 25V, I
D
= 2A
Notes:
1. All D.C. parameters 100% tested at 25擄C unless otherwise stated. (Pulse test: 300碌s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
V
DD
Switching Waveforms and Test Circuit
10V
90%
INPUT
0V
PULSE
GENERATOR
R
gen
10%
t
(ON)
t
(OFF)
t
r
t
d(OFF)
t
F
t
d(ON)
V
DD
10%
10%
INPUT
OUTPUT
0V
90%
90%
2
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