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TN0104ND Datasheet

  • TN0104ND

  • N-Channel Enhancement-Mode Vertical DMOS FETs

  • 38.51KB

  • 4頁

  • SUPERTEX   SUPERTEX

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上傳產(chǎn)品規(guī)格書

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TN0104
Thermal Characteristics
Package
TO-92
TO-243AA
鈥?/div>
I
D
(continuous)*
0.80A
1.40A
I
D
(pulsed)
2.40A
2.90A
Power Dissipation
@ T
C
= 25
擄
C
1.0W
1.6W
鈥?/div>
胃
jc
擄
C/W
125
15
胃
ja
擄
C/W
170
78
鈥?/div>
I
DR
*
0.80A
1.40A
I
DRM
2.40A
2.90A
*
I
D
(continuous) is limited by max rated T
j
.
T
A
= 25擄C. Mounted on FR5 Board, 25mm x 25mm x 1.57mm. Signficant P
D
increase possible on ceramic substrate.
Electrical Characteristics
Symbol
BV
DSS
V
GS(th)
鈭哣
GS(th)
I
GSS
I
DSS
Parameter
Drain-to-Source
Breakdown Voltage
Gate Threshold Voltage
(@ 25擄C unless otherwise specified)
Min
40
0.6
-3.8
0.1
1.6
-5.0
100
1
100
Typ
Max
Unit
V
V
mV/擄C
nA
碌A(chǔ)
碌A(chǔ)
Conditions
V
GS
= 0V, I
D
= 1.0mA
V
GS
= V
DS
, I
D
= 500碌A(chǔ)
V
GS
= V
DS
, I
D
= 1.0mA
V
GS
=
鹵20V,
V
DS
= 0V
V
GS
=0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125擄C
V
GS
= 3V, V
DS
= 20V
A
V
GS
= 5V, V
DS
= 20V
V
GS
= 10V, V
DS
= 20V
V
GS
= 3V, I
D
= 50mA
2.5
1.8
2.0
0.7
0.34
0.45
70
50
15
3.0
7.0
6.0
5.0
5.0
8.0
9.0
8.0
1.8
2.0
300
V
ns
V
GS
= 0V, I
SD
= 1.0A
V
GS
= 0V, I
SD
= 0.5A
V
GS
= 0V, I
SD
= 1A
ns
V
DD
= 20V, I
D
= 1A
R
GEN
= 25鈩?/div>
pF
V
GS
= 0V, V
DS
= 20V
f = 1 MHz
1.0
%/擄C
鈩?/div>
鈩?/div>
V
GS
= 5V, I
D
= 250mA
V
GS
= 10V, I
D
= 1A
V
GS
= 10V, I
D
= 1A
V
GS
=10V, I
D
= 1A,
V
DS
= 20V, I
D
= 0.5A
Change in V
GS(th)
with Temperature
Gate Body Leakage
Zero Gate Voltage Drain Current
I
D(ON)
ON-State Drain Current
0.5
2.0
0.35
1.1
2.6
5.0
All Packages
TO-92
TO-243AA
2.3
1.5
R
DS(ON)
Static Drain-to-Source
ON-State Resistance
鈭哛
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward
Voltage Drop
Reverse Recovery Time
TO-92
TO-243AA
1.2
Notes:
1. All D.C. parameters 100% tested at 25擄C unless otherwise stated. (Pulse test: 300碌s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
V
DD
Switching Waveforms and Test Circuit
10V
90%
INPUT
0V
10%
t
(ON)
t
d(ON)
V
DD
OUTPUT
0V
90%
90%
t
r
t
(OFF)
t
d(OFF)
t
F
D.U.T.
10%
10%
INPUT
PULSE
GENERATOR
R
gen
R
L
OUTPUT
7-32

TN0104ND相關(guān)型號(hào)PDF文件下載

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  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC [ETC]
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC [ETC]
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUPERTEX
  • 英文版
    N-Channel Enhancement-Mode Vertical DMOS FETs
    SUTEX [Sup...
  • 英文版
    N-CHANNEL ENHANCEMENT-MODE D-MOS POWER FETs
    ETC [ETC]

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