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LR645ND Datasheet

  • LR645ND

  • High Input Voltage SMPS Start-up / Linear Regulator

  • 4頁

  • SUPERTEX   SUPERTEX

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LR645
Thermal Characteristics
Package
SO-8
TO-92
TO-220
TO-243AA
鈥?/div>
Block Diagram
胃
ja
擄C/W
400
鈥?/div>
170
70
78
鈥?/div>
Trim
鈥?/div>
+
V
OUT
V
IN
Power Dissipation
@ T
A
= 25擄C
0.31W
0.74W
1.8W
1.6W
胃
jc
擄C/W
156
125
8.3
15
Mounted on FR5 board, 25mm x 25mm x 1.57mm.
Significant P
D
increase possible on ceramic substrate.
Gate
GND
Electrical Characteristics
Test conditions unless otherwise specified: T
A
= 25擄C; V
IN
= 15 to 450V, C
OUT
= 0.01碌F
Symbol
V
OUT
V
OUT
鈭哣
OUT
鈭哣
OUT
V
IN
I
INQ
I
OFF
I
AUX
鈭哣
OUT
/鈭哣
IN
e
n
I
PEAK
V
AUX
Output Voltage
Output Voltage over Temperature
1
Line Regulation
Load Regulation
Operating Input Voltage Range
Input Quiescent Current
V
IN
Off-State Leakage Current
Input Current to V
OUT
Ripple Rejection Ratio
1
Noise voltage
1
Output Peak Current
2
External Voltage Applied to V
OUT
50
60
25
30
13.2
15
50
0.1
Parameter
Min
9.3
9.0
Typ
10
10
40
150
Max
10.7
11.5
200
400
450
150
10
200
Unit
V
V
mV
mV
V
碌A(chǔ)
碌A(chǔ)
碌A(chǔ)
dB
碌V
mA
V
No Load
V
AUX
鈮
OUT
+1V applied to V
OUT
pin
V
AUX
鈮
OUT
+1V applied to V
OUT
pin
120Hz, No Load
0.01 to 100KHz
C
OUT
= 10碌F, V
IN
= 400V
No load
T
J
= -40擄C
鈮?/div>
to + 125擄C, No load
V
IN
=15V to 400V, No load
V
IN
=50V, I
OUT
=0 to 3.0mA
Conditions
8-pin, adjustable output voltage version only.
Test conditions unless otherwise specified: T
A
= 25擄C; V
IN
= 15 to 450V, C
OUT
= 0.01碌F
Symbol
V
OUT
鈭哣
OUT
鈭哣
OUT
Parameter
Output Voltage Trim Range
1
Load Regulation at 8V trim
1
Load Regulation at 12V trim
1
Min
8
200
100
Typ
Max
12
400
400
Unit
V
mV
mV
No load
V
IN
=15V, I
OUT
=0 to 1.0mA
V
IN
=50V, I
OUT
=0 to 3.0mA
Conditions
Notes:
1. Guaranteed by design, not tested in production.
2. Pulse test duration < 1msec, Duty cycle < 2%
2

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