TDA7461N
I
2
C BUS INTERFACE DESCRIPTION
Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (the LSB bit determines read
CHIP ADDRESS
MSB
S
1
0
0
0
1
1
LSB
0 R/W ACK
MSB
X AZ T
/ write transmission)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
SUBADDRESS
LSB
I A3 A2 A1 A0
ACK
MSB
DATA 1 to DATA n
LSB
DATA
ACK
P
D97AU627
S = Start
ACK = Acknowledge
AZ = AutoZero-Remain
T = Testing
I = Autoincrement
P = Stop
MAX CLOCK SPEED 500kbits/s
The transmitted data is automatically updated af-
ter each ACK.
Transmission can be repeated without new chip
address.
SUBADDRESS
(receive mode)
MSB
X
AZ
T
I
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Auto increment
If bit I in the subaddress byte is set to 鈥?鈥? the
autoincrement of the subaddress is enabled.
TRANSMITTED DATA
(send mode)
MSB
X
X
X
X
ST
SM
X
LSB
X
SM = Soft mute activated
ST = Stereo
X = Not Used
LSB
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FUNCTION
Input selector
Loudness / Auto-Zero
Volume
Softmute / Beep
Bass / Treble Attenuator
Bass / Treble Configuration
Speaker attenuator LF
Speaker attenuator LR
Speaker attenuator RF
Speaker attenuator RR / Blanktime adjust
Stereodecoder
Noiseblanker
Fieldstrength Control
Configuration
Stereodecoder Adjustment
Testing
T = Testmode
I = Autoincrement
AZ = Auto Zero Remain
X = not used
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