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UPD6600AGS Datasheet

  • UPD6600AGS

  • 4-BIT SINGLE-CHIP MICROCONTROLLER FOR REMOTE CONTROL TRANSMI...

  • 170.79KB

  • 36頁

  • NEC   NEC

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PD6124A, 6600A
13. CONTROL REGISTER (P
1
)
The control register contains of 10 bits. The controllable items are shown in Table 13-1.
Table 13-1. Control Register (P
1
) (1/2)
(a)
碌
PD6124A
Bit
Name
D
9
D
8
D
7
鈥?/div>
D
6
HALT
D
5
D.P.
AD
9
AD
9
=0
AD
9
=1
D
4
D.P.
AD
8
AD
8
=0
AD
8
=1
D
3
MOD
D
2
Timer
D
1
K
I/O
D
0
RL A
CC
A
0
鈫?/div>
A
3
S-IN
Test mode
0
Set
Value
1
Be sure to set 0.
NOP
OSC
STOP
f
OSC
/8
f
OSC
/12
STOP
RUN
IN
OUT
D
0 ..........................
Specifies data to be input to A
0
when the accumulator is shifted to the left.
0: A
3
, 1:S-IN
D
1 ..........................
Specifies the status of K
I/O
, as follows:
0: input mode, 1: output mode
D
2 ..........................
Specifies the status of the timer, as follows:
0: Count stop, 1: Count execution
D
3 ..........................
Specifies the carrier frequency output from the REM pin.
0: f
OSC
/8, 1: f
OSC
/12
D
4
, D
5 .................
Specify the high-order 2 bits of the ROM data pointer.
D
6 ..........................
Determines what happen to the oscillation circuit when the HALT instruction is executed.
0: Oscillation does not stop
1: Oscillation stops (STOP mode)
D
7 ..........................
Be sure to set this bit to 0.
D
8
, D
9 .................
These bits specify test modes. Be sure to set them to 0.
Remark
D
0
= D
8
= D
9
= 0 on reset, and the other bits are undefined.
13

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