CMOS process. They are unity gain stable and suitable
for a wide range of general purpose applications. With
pin should be by-passed with a 1碌F capacitor.
50mV from the positive and negative rail with a 25k鈩?/div>
load and 100mV from the rails with a 5k鈩?load. The
overriding condition that defines the linear region of the
amplifier is the open loop gain that is specified over that
region. In the voltage output region between V
SS
+
50mV and V
DD
- 50mV, the open loop gain is specified
to 100dB (min) with a 25k鈩?load.
The classical definition of the open loop gain of an
amplifier is:
A
OL
=
鈭哣
OUT
/
鈭哣
OS
where:
A
OL
is the DC open loop gain of the amplifier,
鈭哣
OUT
is equal to
(V
DD
- 50mV) - (V
SS
+ 50mV)
for R
L
= 25k鈩? and
鈭哣
OS
is the change in offset voltage with the
changing output voltage of the amplifier.
3.1
Rail-to-Rail Output Swing
There are two specifications that describe the output
swing capability of the MCP601/602/603/604 family of
operational amplifiers. The first specification, Low Level
and High Level Output Voltage Swing, defines the
absolute maximum swing that can be achieved under
specified loaded conditions. For instance, the Low
Level Output Voltage Swing of the MCP601/602/603/
604 family is specified to be able to swing at least to
15mV from the negative rail with a 25k鈩?load to V
DD
/2.
This output swing performance is shown in Figure 3-1,
where the output of an MCP601 is configured in a gain
of +2V/V and over driven with a 40kHz triangle wave. In
this figure, the degradation of the output swing linearity
is clearly illustrated. This degradation occurs after the
point at which the open loop gain of the amplifier is
specified and before the amplifier reaches its maximum
and minimum output swing.
3.2
Input Voltage and Phase Reversal
Since the MCP601/602/603/604 amplifier family is
designed with CMOS devices, it does not exhibit phase
inversion when the input pins exceed the negative sup-
ply voltage. Figure 3-2 shows an input voltage exceed-
ing both supplies with no resulting phase inversion.
Input and Output Voltage (V)
10
8
6
4
Input Signal (V)
2
0
V
OL
V
OH
0.5
0.3
0.1
V
OH
, V
OL
(0.1mV/div)
V
DD
6
5
4
3
2
1
0
-1
0
10
20
Time(
碌
S)
30
40
50
Input Signal
G = +2V/V
V
DD
= 5V
Output Signal
V
SS
-0.1
-0.3
-0.5
G=+2V/V, V
DD
= 5V
-2
0
10
20
30
40
50
Time (
碌
s)
-0.7
FIGURE 3-1:
Swing
Low Level and High Level Output
FIGURE 3-2:
The MCP601/602/603/604 family of op
amps do not have phase reversal issues. For the
graph, the amplifier is in a unity gain or buffer
configuration.
The second specification that describes the output
swing capability of these amplifiers is the Linear Region
Maximum Output Voltage Swing. This specification
defines the maximum output swing that can be
achieved while the amplifier is still operating in its linear
region.
DS21314D-page 10
錚?/div>
2000 Microchip Technology Inc.
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