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MAX1692EUB+ Datasheet

  • MAX1692EUB+

  • IC REG PWM STEP-DN 5.5VIN 10UMAX

  • 12頁

  • Maxim   Maxim

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Low-Noise, 5.5V-Input,
PWM Step-Down Regulator
MAX1692
Pin Description
PIN
1
2
3
4
5
6
7
NAME
IN
BP
GND
REF
FB
LIM
SYNC/
PWM
SHDN
LX
PGND
FUNCTION
Supply Voltage Input. Input range from +2.7V to +5.5V. Bypass with a 10碌F capacitor.
Supply Bypass Pin. Internally connected to IN. Bypass with a 0.1碌F capacitor.
Do not
connect to an
external power source other than IN.
Ground
1.25V, 1.2% Reference Output. Capable of delivering 50碌A to external loads. Bypass with a 0.22碌F capaci-
tor to GND.
Feedback Input
Current-Limit Select Input. Connect LIM to GND for 0.6A current limit or LIM to IN for 1.2A current limit.
Oscillator Sync and Low-Noise, Mode-Control Input.
SYNC/PWM = IN (Forced PWM Mode)
SYNC/PWM = GND (PWM/PFM Mode)
An external clock signal connected to this pin allows for LX switching synchronization.
Active-Low, Shutdown-Control Input. Reduces quiescent current to 0.1碌A. In shutdown, output becomes
high impedance.
Inductor Connection to the Drains of the Internal Power MOSFETs
Power Ground
8
9
10
CHIP
SUPPLY
PFM CURRENT COMPARATOR
SHDN
10鈩?/div>
BP
MAX1692
IN
REF
REF
GND
12mV
120mV
LIM COMPARATOR
0.1X
1鈩?/div>
P
LX
SENSE FET
PWM
COMPARATOR
CONTROL AND
DRIVER LOGIC
FB
REF
PWM ON
SIGNAL
FB
ON
ON
REF
PFM
COMPARATOR
REF
OVERVOLTAGE
COMPARATOR
FB
NEGLIM
COMPARATOR
5mV IN PFM
ADJ. IN PWM
40mV
1鈩?/div>
PGND
RAMP
GEN
SYNC
CELL
PWM
SLOPE COMPENSATION
SENSE FET
0.1X
N
SYNC/
PWM
Figure 1. Simplified Functional Diagram
6
_______________________________________________________________________________________

MAX1692EUB+ 產(chǎn)品屬性

  • Lead (SnPb) Finish for COTSObsolescence Mitigation Program

  • 50

  • 集成電路 (IC)

  • PMIC - 穩(wěn)壓器 - DC DC 開關穩(wěn)壓器

  • -

  • 降壓（降壓）

  • 可調(diào)式

  • 1

  • 1.25 V ~ 5.5 V

  • 2.7 V ~ 5.5 V

  • 電流模式，混合

  • 750kHz

  • 600mA

  • 是

  • -40°C ~ 85°C

  • 表面貼裝

  • 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）

  • 管件

  • 10-µMAX

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