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EPM240T100C5N Datasheet

  • EPM240T100C5N

  • MAX II ISP CPLD 240, TQFP100, 240; CPLD Type:FLASH; No. of M...

  • 101頁(yè)

  • Altera   Altera

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5鈥?
Chapter 5: DC and Switching Characteristics
Power Consumption
Power-Up Timing
Table 5鈥?2
shows the power-up timing characteristics for MAX II devices.
Table 5鈥?2.
MAX II Power-Up Timing
Symbol
t
CONFIG
(1)
Parameter
The amount of time from when
minimum V
CCINT
is reached until
the device enters user mode
(2)
Device
EPM240
EPM570
EPM1270
EPM2210
Notes to
Table 5鈥?2:
(1)
Table 5鈥?2
values apply to commercial and industrial range devices. For extended temperature range devices, the t
CONFIG
maximum values are
as follows:
Device
Maximum
EPM240
300 碌s
EPM570
400 碌s
EPM1270
400 碌s
EPM2210
500 碌s
(2) For more information about POR trigger voltage, refer to the
Hot Socketing and Power-On Reset in MAX II Devices
chapter in the
MAX II Device
Handbook.
Min
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Typ
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Max
200
300
300
450
Unit
碌s
碌s
碌s
碌s
Power Consumption
Designers can use the Altera
廬
PowerPlay Early Power Estimator and PowerPlay
Power Analyzer to estimate the device power.
f
For more information about these power analysis tools, refer to the
Understanding and
Evaluating Power in MAX II Devices
chapter in the
MAX II Device Handbook
and the
PowerPlay Power Analysis
chapter in volume 3 of the
Quartus II Handbook.
Timing Model and Specifications
MAX II devices timing can be analyzed with the Altera Quartus
廬
II software, a variety
of popular industry-standard EDA simulators and timing analyzers, or with the
timing model shown in
Figure 5鈥?.
MAX II devices have predictable internal delays that enable the designer to determine
the worst-case timing of any design. The software provides timing simulation, point-
to-point delay prediction, and detailed timing analysis for device-wide performance
evaluation.
MAX II Device Handbook
漏 Novermber 2008 Altera Corporation

EPM240T100C5N 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1964EPM240T100C5N-ND

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