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EPM240T100C5N Datasheet

  • EPM240T100C5N

  • MAX II ISP CPLD 240, TQFP100, 240; CPLD Type:FLASH; No. of M...

  • 1035.40KB

  • 101頁

  • Altera   Altera

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Chapter 5: DC and Switching Characteristics
Operating Conditions
5鈥?
Programming/Erasure Specifications
Table 5鈥?
shows the MAX II device family programming/erasure specifications.
Table 5鈥?.
MAX II Device Programming/Erasure Specifications
Parameter
Erase and reprogram cycles
Note to
Table 5鈥?:
(1) This specification applies to the UFM and configuration flash memory (CFM) blocks.
Minimum
鈥?/div>
Typical
鈥?/div>
Maximum
100
(1)
Unit
Cycles
DC Electrical Characteristics
Table 5鈥?
shows the MAX II device family DC electrical characteristics.
Table 5鈥?.
MAX II Device DC Electrical Characteristics
(Note 1)
(Part 1 of 2)
Symbol
I
I
I
OZ
I
CCSTANDBY
Parameter
Input pin leakage
current
Tri-stated I/O pin
leakage current
V
CCINT
supply current
(standby)
(3)
Conditions
V
I
= V
CCIO
max to 0 V
(2)
V
O
= V
CCIO
max to 0 V
(2)
MAX II devices
MAX IIG devices
EPM240Z
EPM570Z
V
SCHMITT
(4)
I
CCPOWERUP
Hysteresis for Schmitt
trigger input
(5)
V
CCINT
supply current
during power-up
(6)
Value of I/O pin pull-up
resistor during user
mode and in-system
programming
V
CCIO
= 3.3 V
V
CCIO
= 2.5 V
MAX II devices
MAX IIG and MAX IIZ
devices
V
CCIO
= 3.3 V
(7)
V
CCIO
= 2.5 V
(7)
V
CCIO
= 1.8 V
(7)
V
CCIO
= 1.5 V
(7)
Minimum
鈥?0
鈥?0
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
5
10
25
45
Typical
鈥?/div>
鈥?/div>
12
2
29
32
400
190
55
40
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Maximum
10
10
鈥?/div>
鈥?/div>
150
210
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
25
40
60
95
Unit
碌A(chǔ)
碌A(chǔ)
mA
mA
碌A(chǔ)
碌A(chǔ)
mV
mV
mA
mA
k惟
k惟
k惟
k惟
R
PULLUP
漏 Novermber 2008 Altera Corporation
MAX II Device Handbook

EPM240T100C5N 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1964EPM240T100C5N-ND

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