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EPM240T100C5N Datasheet

  • EPM240T100C5N

  • MAX II ISP CPLD 240, TQFP100, 240; CPLD Type:FLASH; No. of M...

  • 101頁

  • Altera   Altera

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上傳產(chǎn)品規(guī)格書

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2鈥?8
Chapter 2: MAX II Architecture
I/O Structure
Figure 2鈥?3.
MAX II I/O Banks for EPM1270 and EPM2210
(Note 1), (2)
I/O Bank 2
All I/O Banks Support
鈻?/div>
3.3-V LVTTL/LVCMOS
鈻?/div>
2.5-V LVTTL/LVCMOS
鈻?/div>
1.8-V LVTTL/LVCMOS
鈻?/div>
1.5-V LVCMOS
I/O Bank 1
Also Supports
the 3.3-V PCI
I/O Standard
I/O Bank 3
I/O Bank 4
Notes to
Figure 2鈥?3:
(1)
Figure 2鈥?3
is a top view of the silicon die.
(2)
Figure 2鈥?3
is a graphical representation only. Refer to the pin list and the Quartus II software for exact pin locations.
Each I/O bank has dedicated V
CCIO
pins that determine the voltage standard support
in that bank. A single device can support 1.5-V, 1.8-V, 2.5-V, and 3.3-V interfaces; each
individual bank can support a different standard. Each I/O bank can support
multiple standards with the same V
CCIO
for input and output pins. For example, when
V
CCIO
is 3.3 V, Bank 3 can support LVTTL, LVCMOS, and 3.3-V PCI. V
CCIO
powers both
the input and output buffers in MAX II devices.
The JTAG pins for MAX II devices are dedicated pins that cannot be used as regular
I/O pins. The pins
TMS, TDI, TDO,
and
TCK
support all the I/O standards shown in
Table 2鈥? on page 2鈥?7
except for PCI. These pins reside in Bank 1 for all MAX II
devices and their I/O standard support is controlled by the V
CCIO
setting for Bank 1.
PCI Compliance
The MAX II EPM1270 and EPM2210 devices are compliant with PCI applications as
well as all 3.3-V electrical specifications in the
PCI Local Bus Specification Revision 2.2.
These devices are also large enough to support PCI intellectual property (IP) cores.
Table 2鈥?
shows the MAX II device speed grades that meet the PCI timing
specifications.
MAX II Device Handbook
漏 October 2008 Altera Corporation

EPM240T100C5N 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1964EPM240T100C5N-ND

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