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EPM240T100C5N Datasheet

  • EPM240T100C5N

  • MAX II ISP CPLD 240, TQFP100, 240; CPLD Type:FLASH; No. of M...

  • 101頁(yè)

  • Altera   Altera

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1. Introduction
MII51001-1.8
Introduction
The MAX
廬
II family of instant-on, non-volatile CPLDs is based on a 0.18-碌m, 6-layer-
metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210
equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high
I/O counts, fast performance, and reliable fitting versus other CPLD architectures.
Featuring MultiVolt core, a user flash memory (UFM) block, and enhanced in-system
programmability (ISP), MAX II devices are designed to reduce cost and power while
providing programmable solutions for applications such as bus bridging, I/O
expansion, power-on reset (POR) and sequencing control, and device configuration
control.
Features
The MAX II CPLD has the following features:
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Low-cost, low-power CPLD
Instant-on, non-volatile architecture
Standby current as low as 29 碌A(chǔ)
Provides fast propagation delay and clock-to-output times
Provides four global clocks with two clocks available per logic array block (LAB)
UFM block up to 8 Kbits for non-volatile storage
MultiVolt core enabling external supply voltages to the device of either 3.3 V/2.5 V
or 1.8 V
MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic levels
Bus-friendly architecture including programmable slew rate, drive strength, bus-
hold, and programmable pull-up resistors
Schmitt triggers enabling noise tolerant inputs (programmable per pin)
I/Os are fully compliant with the Peripheral Component Interconnect Special
Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V
operation at 66 MHz
Supports hot-socketing
Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry
compliant with IEEE Std. 1149.1-1990
ISP circuitry compliant with IEEE Std. 1532
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漏 October 2008
Altera Corporation
MAX II Device Handbook

EPM240T100C5N 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤(pán)

  • 544-1964EPM240T100C5N-ND

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