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EPM240T100C5 Datasheet

  • EPM240T100C5

  • CPLD MAX II Family 192 Macro Cells 1879.7MHz 0.18um Technolo...

  • 101頁(yè)

  • Altera   Altera

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5鈥?
Chapter 5: DC and Switching Characteristics
Operating Conditions
Table 5鈥?.
3.3-V LVCMOS Specifications (Part 2 of 2)
Symbol
V
OH
V
OL
Parameter
High-level output voltage
Low-level output voltage
Conditions
V
CCIO
= 3.0,
IOH = 鈥?.1 mA
(1)
V
CCIO
= 3.0,
IOL = 0.1 mA
(1)
Minimum
V
CCIO
鈥?0.2
鈥?/div>
Maximum
鈥?/div>
0.2
Unit
V
V
Table 5鈥?.
2.5-V I/O Specifications
Symbol
V
CCIO
V
IH
V
IL
V
OH
Parameter
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Conditions
鈥?/div>
鈥?/div>
鈥?/div>
IOH = 鈥?.1 mA
(1)
IOH = 鈥? mA
(1)
IOH = 鈥? mA
(1)
V
OL
Low-level output voltage
IOL = 0.1 mA
(1)
IOL = 1 mA
(1)
IOL = 2 mA
(1)
Table 5鈥?.
1.8-V I/O Specifications
Symbol
V
CCIO
V
IH
V
IL
V
OH
V
OL
Parameter
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
鈥?/div>
鈥?/div>
鈥?/div>
IOH = 鈥? mA
(1)
IOL = 2 mA
(1)
Minimum
1.71
0.65 脳 V
CCIO
鈥?.3
V
CCIO
鈥?0.45
鈥?/div>
Maximum
1.89
2.25
(2)
0.35 脳 V
CCIO
鈥?/div>
0.45
Unit
V
V
V
V
V
Minimum
2.375
1.7
鈥?.5
2.1
2.0
1.7
鈥?/div>
鈥?/div>
鈥?/div>
Maximum
2.625
4.0
0.7
鈥?/div>
鈥?/div>
鈥?/div>
0.2
0.4
0.7
Unit
V
V
V
V
V
V
V
V
V
Table 5鈥?.
1.5-V I/O Specifications
Symbol
V
CCIO
V
IH
V
IL
V
OH
V
OL
Parameter
I/O supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
鈥?/div>
鈥?/div>
鈥?/div>
IOH = 鈥? mA
(1)
IOL = 2 mA
(1)
Minimum
1.425
0.65 脳 V
CCIO
鈥?.3
0.75 脳 V
CCIO
鈥?/div>
Maximum
1.575
V
CCIO
+ 0.3
(2)
0.35 脳 V
CCIO
鈥?/div>
0.25 脳 V
CCIO
Unit
V
V
V
V
V
Notes to
Table 5鈥?
through
Table 5鈥?:
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown
in the
MAX II Architecture
chapter (I/O
Structure section)
in the
MAX II Device Handbook.
(2) This maximum V
IH
reflects the JEDEC specification. The MAX II input buffer can tolerate a V
IH
maximum of 4.0, as specified
by the V
I
parameter in
Table 5鈥?.
MAX II Device Handbook
漏 Novermber 2008 Altera Corporation

EPM240T100C5 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1146

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