音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

EPM240T100C5 Datasheet

  • EPM240T100C5

  • CPLD MAX II Family 192 Macro Cells 1879.7MHz 0.18um Technolo...

  • 101頁

  • Altera   Altera

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

4. Hot Socketing and Power-On Reset in
MAX II Devices
MII51004-2.1
Introduction
MAX
廬
II devices offer hot socketing, also known as hot plug-in or hot swap, and
power sequencing support. Designers can insert or remove a MAX II board in a
system during operation without undesirable effects to the system bus. The hot
socketing feature removes some of the difficulties designers face when using
components on printed circuit boards (PCBs) that contain a mixture of 3.3-, 2.5-, 1.8-,
and 1.5-V devices.
The MAX II device hot socketing feature provides:
鈻?/div>
鈻?/div>
鈻?/div>
Board or device insertion and removal
Support for any power-up sequence
Non-intrusive I/O buffers to system buses during hot insertion
This chapter contains the following sections:
鈻?/div>
鈻?/div>
鈥淢AX II Hot-Socketing Specifications鈥?on page 4鈥?
鈥淧ower-On Reset Circuitry鈥?on page 4鈥?
MAX II Hot-Socketing Specifications
MAX II devices offer all three of the features required for the hot-socketing capability
listed above without any external components or special design requirements. The
following are hot-socketing specifications:
鈻?/div>
The device can be driven before and during power-up or power-down without
any damage to the device itself.
I/O pins remain tri-stated during power-up. The device does not drive out before
or during power-up, thereby affecting other buses in operation.
Signal pins do not drive the V
CCIO
or V
CCINT
power supplies. External input signals
to device I/O pins do not power the device V
CCIO
or V
CCINT
power supplies via
internal paths. This is true if the V
CCINT
and the V
CCIO
supplies are held at GND.
鈻?/div>
鈻?/div>
1
Altera uses
GND
as reference for the hot-socketing and I/O buffers circuitry designs.
You must connect the
GND
between boards before connecting the V
CCINT
and the V
CCIO
power supplies to ensure device reliability and compliance to the hot-socketing
specifications.
Devices Can Be Driven before Power-Up
Signals can be driven into the MAX II device I/O pins and
GCLK[3..0]
pins before
or during power-up or power-down without damaging the device. MAX II devices
support any power-up or power-down sequence (V
CCIO1
, V
CCIO2
, V
CCIO3
, V
CCIO4
, V
CCINT
),
simplifying the system-level design.
漏 October 2008
Altera Corporation
MAX II Device Handbook

EPM240T100C5 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1146

EPM240T100C5相關(guān)型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！