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EPM240T100C5 Datasheet

  • EPM240T100C5

  • CPLD MAX II Family 192 Macro Cells 1879.7MHz 0.18um Technolo...

  • 101頁

  • Altera   Altera

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3鈥?
Chapter 3: JTAG and In-System Programmability
IEEE Std. 1149.1 (JTAG) Boundary-Scan Support
Table 3鈥?.
MAX II JTAG Instructions (Part 2 of 2)
JTAG Instruction
CLAMP
(1)
Instruction Code
00 0000 1010
Description
Places the 1-bit bypass register between the
TDI
and
TDO
pins,
which allows the boundary scan test data to pass synchronously
through selected devices to adjacent devices during normal device
operation, while holding I/O pins to a state defined by the data in the
boundary-scan register.
This instruction allows you to define the scan chain between
TDI
and
TDO
in the MAX II logic array. This instruction is also used for
custom logic and JTAG interfaces.
This instruction allows you to define the scan chain between
TDI
and
TDO
in the MAX II logic array. This instruction is also used for
custom logic and JTAG interfaces.
IEEE 1532 ISC instructions used when programming a MAX II device
via the JTAG port.
USER0
00 0000 1100
USER1
00 0000 1110
IEEE 1532
instructions
Notes to
Table 3鈥?:
(2)
(1)
HIGHZ, CLAMP,
and
EXTEST
instructions do not disable weak pull-up resistors or bus hold features.
(2) These instructions are shown in the 1532 BSDL files, which will be posted on the Altera
廬
website at
www.altera.com
when they are available.
w
Unsupported JTAG instructions should not be issued to the MAX II device as this may
put the device into an unknown state, requiring a power cycle to recover device
operation.
The MAX II device instruction register length is 10 bits and the
USERCODE
register
length is 32 bits.
Table 3鈥?
and
Table 3鈥?
show the boundary-scan register length and
device
IDCODE
information for MAX II devices.
Table 3鈥?.
MAX II Boundary-Scan Register Length
Device
EPM240
EPM570
EPM1270
EPM2210
Boundary-Scan Register Length
240
480
636
816
Table 3鈥?.
32-Bit MAX II Device IDCODE (Part 1 of 2)
Binary IDCODE (32 Bits)
(1)
Device
EPM240
EPM240G
EPM570
EPM570G
EPM1270
EPM1270G
EPM2210
EPM2210G
0000
0010 0000 1010 0100
000 0110 1110
1
0x020A40DD
0000
0010 0000 1010 0011
000 0110 1110
1
0x020A30DD
0000
0010 0000 1010 0010
000 0110 1110
1
0x020A20DD
Version
(4 Bits)
0000
Part Number
0010 0000 1010 0001
Manufacturer
Identity (11 Bits)
000 0110 1110
LSB
(1 Bit)
(2)
1
HEX IDCODE
0x020A10DD
MAX II Device Handbook
漏 October 2008 Altera Corporation

EPM240T100C5 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1146

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