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EPM240T100C5 Datasheet

  • EPM240T100C5

  • CPLD MAX II Family 192 Macro Cells 1879.7MHz 0.18um Technolo...

  • 101頁

  • Altera   Altera

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Chapter 1: Introduction
Features
1鈥?
MAX II devices are available in space-saving FineLine BGA, Micro FineLine BGA, and
thin quad flat pack (TQFP) packages (refer to
Table 1鈥?
and
1鈥?).
MAX II devices
support vertical migration within the same package (for example, you can migrate
between the EPM570, EPM1270, and EPM2210 devices in the 256-pin FineLine BGA
package). Vertical migration means that you can migrate to devices whose dedicated
pins and JTAG pins are the same and power pins are subsets or supersets for a given
package across device densities. The largest density in any package has the highest
number of power pins; you must lay out for the largest planned density in a package
to provide the necessary power pins for migration. For I/O pin migration across
densities, cross reference the available I/O pins using the device pin-outs for all
planned densities of a given package type to identify which I/O pins can be migrated.
The Quartus
廬
II software can automatically cross-reference and place all pins for you
when given a device migration list.
Table 1鈥?.
MAX II Packages and User I/O Pins
68-Pin
Micro
FineLine
BGA
(1)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
54
鈥?/div>
100-Pin
Micro
FineLine
BGA
(1)
80
76
鈥?/div>
鈥?/div>
80
76
100-Pin
FineLine
BGA
(1)
80
76
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
144-Pin
Micro
FineLine
BGA
(1)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
116
256-Pin
Micro
FineLine
BGA
(1)
鈥?/div>
160
212
鈥?/div>
鈥?/div>
160
256-Pin
FineLine
BGA
鈥?/div>
160
212
204
鈥?/div>
鈥?/div>
324-Pin
FineLine
BGA
鈥?/div>
鈥?/div>
鈥?/div>
272
鈥?/div>
鈥?/div>
Device
EPM240
EPM240G
EPM570
EPM570G
EPM1270
EPM1270G
EPM2210
EPM2210G
EPM240Z
EPM570Z
100-Pin
TQFP
80
76
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
144-Pin
TQFP
鈥?/div>
116
116
鈥?/div>
鈥?/div>
鈥?/div>
Note to
Table 1鈥?:
(1) Packages available in lead-free versions only.
Table 1鈥?.
MAX II TQFP, FineLine BGA, and Micro FineLine BGA Package Sizes
68-Pin
Micro
FineLine
BGA
0.5
25
5脳5
100-Pin
Micro
FineLine
BGA
0.5
36
6脳6
100-Pin
FineLine
BGA
1
121
11 脳 11
144-Pin
Micro
FineLine
BGA
0.5
49
7脳7
256-Pin
Micro
FineLine
BGA
0.5
121
11 脳 11
256-Pin
FineLine
BGA
1
289
17 脳 17
324-Pin
FineLine
BGA
1
361
19 脳 19
Package
Pitch (mm)
Area (mm2)
Length 脳 width
(mm 脳 mm)
100-Pin
TQFP
0.5
256
16 脳 16
144-Pin
TQFP
0.5
484
22 脳 22
漏 October 2008
Altera Corporation
MAX II Device Handbook

EPM240T100C5 產(chǎn)品屬性

  • 270

  • 集成電路 (IC)

  • 嵌入式 - CPLD（復(fù)雜可編程邏輯器件）

  • MAX® II

  • 系統(tǒng)內(nèi)可編程

  • 4.7ns

  • 2.5V，3.3V

  • 240

  • 192

  • -

  • 80

  • 0°C ~ 85°C

  • 表面貼裝

  • 100-TQFP

  • 100-TQFP（14x14）

  • 托盤

  • 544-1146

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