8
7
6
5
4
3
2
1
D[0..15]
A[0..14]
D
R?
VCC
35
2
7
13
21
36
40
47
50
52
60
62
93
103
121
22K
U2
U?
U2
110
111
112
114
115
116
117
118
119
122
123
124
125
126
127
128
131
129
130
4
6
1
132
98
105
106
107
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
D0
D1
D2
D3
D4
D5
D6
D7
WE-
UIO0
3
4
7
8
13
14
17
18
11
1
D1
D2
D3
D4
D5
D6
D7
D8
CLK
G
74LS377
USER OUTPUTS
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
2
5
6
9
12
15
16
19
UO0-0
UO0-1
UO0-2
UO0-3
UO0-4
UO0-5
UO0-6
UO0-7
A0
A1
A2
UIO
A3
A4
1
2
3
6
4
5
A
B
C
G1
G2A
G2B
138
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
9
7
UIO0
UIO1
UIO2
UIO3
UIO4
UIO5
UIO6
UIO7
D
C
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
9
10
11
12
15
16
17
18
19
22
23
24
25
26
27
28
63
64
72
94
67
68
69
70
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
POSLIM1
NEGLIM1
AXISIN1
AXISOUT1
QUADA1
QUADB1
~INDEX1
~HOME1
~RS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
ADDR0
ADDR1
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
ADDR11
ADDR12
ADDR13
ADDR14
ADDR15
N/C
~RAMSLCT
~PERIPHSLCT
R/~W
~STROBE
~WRITEENBL
W/~R
U2
U2
IS-
WE-
W/R
D8
D9
D10
D11
D12
D13
D14
D15
WE-
UIO0
3
4
7
8
13
14
17
18
11
1
D1
D2
D3
D4
D5
D6
D7
D8
CLK
G
74LS377
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
2
5
6
9
12
15
16
19
UO0-8
UO0-9
UO0-10
UO0-11
UO0-12
UO0-13
UO0-14
UO0-15
A12
2
NOT
NOR2
1
A12n
IS-
2
1
3
UIO
U2
C
~HOSTINTRPT
DIRECTION1
PULSE1
ATREST1
U2
A12n
IS-
2
1
3
OR2
OR3
UIOn
W/R
UIO0
2
3
4
U2
1
UI0n
SRLRCV
SRLXMT
SRLENABLE
I/OINTRPT
PRLENABLE
B
43
44
99
53
65
74
89
75
88
76
83
77
82
84
85
86
87
U2
D0
D1
D2
D3
D4
D5
D6
D7
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
244
U2
D8
D9
D10
D11
D12
D13
D14
D15
18
16
14
12
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
1G
2G
244
2
4
6
8
11
13
15
17
1
19
UI0-8
UI0-9
UI0-10
UI0-11
UI0-12
UI0-13
UI0-14
UI0-15
UI0n
UI0n
2
4
6
8
11
13
15
17
1
19
UI0-0
UI0-1
UI0-2
UI0-3
UI0-4
UI0-5
UI0-6
UI0-7
UI0n
UI0n
USER INPUTS
THE LOGIC LABELED U2 MAY BE IMPLEMENTED IN
A CPLD. THE LOWER 8 ADDRESS BITS, A0-A8, MAY BE
DECODED TO PROVIDE 256 16 BIT USER INPUTS
AND 256 USER OUTPUTS.
B
ANALOG1
ANALOG2
ANALOG3
ANALOG4
ANALOG5
ANALOG6
ANALOG7
ANALOG8
ANALOGVCC
ANALOGREFHIGH
ANALOGREFLOW
ANALOGGND
RS-
CLK
41
58
~RESET
CLOCKIN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CP2N11
GND
A
3
8
14
20
29
37
46
56
59
61
71
92
104
113
120
A
PERFORMANCE MOTION DEVICES
55 OLD BEDFORD RD
LINCOLN, MA 01773
Title
USER I/O
Size
B
Date:
8
7
6
5
4
3
Document Number
Saturday, December 07, 2002
2
Rev
D
Sheet
1
of
1
0