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MC3510 Datasheet

  • MC3510

  • ETC [Pilot Motion Processor]

  • ETC

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Pin Name
CPPeriphSlct
CPAddr0
CPAddr1
CPAddr15
MasterClkIn
CPClk
Direction
input
input
input
output
bi-directional,
tri-state
Description
This signal goes
low
when a peripheral device on the data bus is being addressed. It
should be connected to CP chip pin 130,
PeriphSlct.
These signals are
high
when the CP chip is communicating with the I/O chip (as
distinguished from any other device on the data bus). They should be connected to
CP chip pins 110 (
Addr0
), 111 (
Addr1
), and 128 (
Addr15
).
This is the master clock signal for the motion processor. It is driven at a nominal
40 MHz
This signal provides the clock pulse for the CP chip. Its frequency is half that of
MasterClkIn
(pin 89), or 20 MHz nominal. It is connected directly to the CP chip
I/Oclk
signal (pin 58).
These signals transmit data between the host and the Motion processor through
the parallel port. Transmission is mediated by the control signals
~HostSlct,
~HostWrite, ~HostRead and HostCmd
.
In 16-bit mode, all 16 bits are used (
HostData0-15
). In 8-bit mode, only the low-
order 8 bits of data are used (
HostData0-7
).
HostData0
HostData1
HostData2
HostData3
HostData4
HostData5
HostData6
HostData7
HostData8
HostData9
HostData10
HostData11
HostData12
HostData13
HostData14
HostData15
CPData0
CPData1
CPData2
CPData3
CPData4
CPData5
CPData6
CPData7
CPData8
CPData9
CPData10
CPData11
CPData12
CPData13
CPData14
CPData15
bi-directional
These signals transmit data between the I/O chip and pins
Data0-15
of the CP chip,
via the motion processor data bus.
MC3510 Technical Specifications
30

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