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MC3510 Datasheet

  • MC3510

  • ETC [Pilot Motion Processor]

  • ETC

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Timing Interval
~HostSlct Setup Time
HostCmd Setup Time
HostCmd Hold Time
Read Data Access Time
Read Data Hold Time
~HostRead High to HI-Z Time
HostRdy Delay Time
~HostWrite Pulse Width
Write Data Delay Time
Write Data Hold Time
Read Recovery Time
(note 2)
Write Recovery Time
(note 2)
Read Pulse Width
Address Setup Delay Time
Data Access Time
Data Hold Time
Address Setup Delay Time
Address Setup to WriteEnable High
RAMSlct Low to WriteEnable High
Address Hold Time
WriteEnable Pulse Width
Data Setup Time
Data Setup before Write High Time
Address Setup Delay Time
Data Access Time
Data Hold Time
Address Setup Delay Time
Address Setup to WriteEnable High
PeriphSlct Low to WriteEnable High
Address Hold Time
WriteEnable Pulse Width
Data Setup Time
Data Setup before Write High Time
Read to Write Delay Time
Reset Low Pulse Width
RAMSlct Low to Strobe Low
Strobe High to RAMSlct High
WriteEnable Low to Strobe Low
Strobe High to WriteEnable High
PeriphSlct Low to Strobe Low
Strobe High to PeriphSlct High
Tn
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
T24
T25
T26
T27
T28
T29
T30
T31
T32
T33
T34
T35
T36
T37
T38
T39
T40
T50
T51
T52
T53
T54
T55
T56
Minimum
0 nsec
0 nsec
0 nsec
Maximum
100 nsec
70 nsec
0 nsec
60 nsec
60 nsec
70 nsec
25 nsec
10 nsec
20 nsec
150 nsec
35 nsec
7 nsec
19 nsec
2 nsec
7 nsec
72 nsec
79 nsec
17 nsec
39 nsec
3 nsec
42 nsec
7 nsec
71 nsec
2 nsec
7 nsec
122 nsec
129 nsec
17 nsec
89 nsec
3 nsec
92 nsec
50 nsec
5.0
碌sec
1 nsec
4 nsec
1 nsec
3 nsec
1 nsec
4 nsec
Note 1
Performance figures and timing information valid at F
clk
= 20.0 MHz only. For timing
information and performance parameters at F
clk
< 20.0 MHz, refer to section 7.1.
Note 2
The clock low/high split has an allowable range of 45-55%.
MC3510 Technical Specifications
17

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