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LTC1314CS Datasheet

  • LTC1314CS

  • Linear Technology [PCMCIA Switching Matrix with Built-In N-...

  • LINER

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LTC1314/LTC1315
TYPICAL PERFORMANCE CHARACTERISTICS
I
DD
vs V
DD
80
70
60
VPP
IN
= 12V
V
CCIN
= 5V
T = 25擄C
VPP
OUT
= VPP
IN
IPP
IN
(碌A)
I
DD
(碌A)
50
40
30
20
10
0
0
1
2
PIN FUNCTIONS
LTC1314
VPP
IN
(Pin 1):
12V Power Input.
NC (Pin 2):
Not Connected.
SHDN (Pin 3):
Shutdown Output. When the output is high,
the external 12V regulator can be shut down to conserve
power consumption.
EN0, EN1 (Pins 4, 5):
Logic inputs that control the voltage
output on VPP
OUT
. The input thresholds are compatible
with TTL/CMOS levels. Refer to Truth Table.
V
CC0
(Pin 6):
Logic input that controls the state of the
MOSFET gate driver DRV3. ESD protection device limits
input excursions to 0.6V below ground.
V
CC1
(Pin 7):
Logic input that controls the state of the
MOSFET gate driver DRV5. ESD protection device limits
input excursions to 0.6V below ground.
DRV5, DRV3 (Pins 8, 9):
Gate driver outputs that control
the external MOSFETs that switch the V
CC
pin of card slot
to Hi-Z, 3.3V, or 5V.
V
DD
(Pin 10):
Positive Supply, 4.5V
鈮?/div>
V
DD
鈮?/div>
5.5V. This pin
supplies the power to the control logic and the charge
pumps and must be continuously powered.
GND (Pin 11):
Ground Connection.
VPP
OUT
(Pin 12):
Switched output that provides 0V, 3.3V,
5V, 12V, or Hi-Z to the VPP pin of the card slot. Refer to
Truth Table.
NC (Pin 13):
Not Connected.
V
CCIN
(Pin 14):
5V or 3.3V Power Input.
4
U W
3
IPP
IN
vs VPP
IN
20
18
16
14
12
10
8
6
4
VPP
OUT
= 0V
OR HI-Z
4
5
6
V
DD
(V)
1314/15 G04
V
DD
= V
CCIN
= 5V
T = 25擄C
VPP
OUT
= VPP
IN
VPP
OUT
= V
CCIN
VPP
OUT
= V
CCIN
VPP
OUT
= 0V
OR HI-Z
0
2
4
8
6
VPP
IN
(V)
10
12
14
2
0
1314/15 G05
U
U
U

LTC1314CS 產(chǎn)品屬性

  • LTC1314/15

  • 55

  • 集成電路 (IC)

  • PMIC - 電源分配開關

  • -

  • PCMCIA/Cardbus 開關

  • 1

  • 1.2 歐姆

  • 120mA

  • 3 V ~ 5.5 V

  • 0°C ~ 70°C

  • 表面貼裝

  • 14-SOIC(0.154",3.90mm 寬)

  • 14-SOIC

  • 管件

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