LT6003/LT6004/LT6005
APPLICATIONS INFORMATION
Supply Voltage
The positive supply of the LT6003/LT6004/LT6005 should
be bypassed with a small capacitor (about 0.01渭F) within
an inch of the pin. When driving heavy loads, an additional
4.7渭F electrolytic capacitor should be used. When using split
supplies, the same is true for the negative supply pin.
Rail-to-Rail Characteristics
The LT6003/LT6004/LT6005 are fully functional for an input
signal range from the negative supply to the positive sup-
ply. Figure 1 shows a simpli鏗乪d schematic of the ampli鏗乪r.
The input stage consists of two differential ampli鏗乪rs, a
PNP stage Q3/Q6 and an NPN stage Q4/ Q5 that are active
over different ranges of the input common mode voltage.
The PNP stage is active for common mode voltages,
V
CM
, between the negative supply to approximately 0.9V
below the positive supply. As V
CM
moves closer towards
the positive supply, the transistor Q7 will steer Q2鈥檚 tail
current to the current mirror Q8/Q9, activating the NPN
differential pair. The PNP pair becomes inactive for the
rest of the input common mode voltage range up to the
positive supply.
The second stage is a folded cascode and current mir-
ror that converts the input stage differential signals into
a single ended output. Capacitor C1 reduces the unity
cross frequency and improves the frequency stability
without degrading the gain bandwidth of the ampli鏗乪r.
The complementary drive generator supplies current to
the output transistors that swing from rail to rail.
Input
Input bias current (I
B
) is minimized with cancellation
circuitry on both input stages. The cancellation circuitry
remains active when V
CM
is more than 300mV from either
rail. As V
CM
approaches V
鈥?/div>
the cancellation circuitry turns
off and I
B
is determined by the tail current of Q2 and the
beta of the PNP input transistors. As V
CM
approaches V
+
devices in the cancellation circuitry saturate causing I
B
to
increase (in the nanoamp range). Input offset voltage errors
due to I
B
can be minimized by equalizing the noninverting
and inverting source impedances.
The input offset voltage changes depending on which input
stage is active; input offset voltage is trimmed on both
input stages, and is guaranteed to be 500渭V max in the
PNP stage. By trimming the input offset voltage of both
input stages, the input offset voltage shift over the entire
common mode range (CMRR) is typically 160渭V, maintain-
ing the precision characteristics of the ampli鏗乪r.
The input stage of the LT6003/LT6004/LT6005 incorpo-
rates phase reversal protection to prevent wrong polarity
outputs from occurring when the inputs are driven up to
9V below the negative rail. 600k protective resistors are
included in the input leads so that current does not become
excessive when the inputs are forced below V
鈥?/div>
or when
a large differential signal is applied. Input current should
be limited to 10mA when the inputs are driven above the
positive rail.
Output
The output of the LT6003/LT6004/LT6005 is guaranteed to
swing within 100mV of the positive rail and 50mV of the
negative rail with no load, over the industrial temperature
range. The LT6003/LT6004/LT6005 can typically source
8mA on a single 5V supply. Sourcing current is reduced
to 5mA on a single 1.8V supply as noted in the electrical
characteristics. However, when sourcing more than 250渭A
with an output load impedance greater than 20k惟, a 1渭F
capacitor in series with a 2k resistor should be placed
from the output to ground to insure stability.
The normally reverse-biased substrate diode from the
output to V
鈥?/div>
will cause unlimited currents to 鏗俹w when
the output is forced below V
鈥?/div>
. If the current is transient
and limited to 100mA, no damage will occur.
600345f
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