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LT1534C Datasheet

  • LT1534C

  • Linear Technology [Ultralow Noise 2A Switching Regulators]

  • LINER

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LT1534/LT1534-1
APPLICATIONS INFORMATION
One word of caution. Sometimes a feedback zero is added
to the control loop by placing a capacitor across R1 above.
If the feedback zero capacitively pulls the FB pin above the
internal regulator voltage (2.4V typ), output regulation
may be disrupted. A series resistance with the feedback
pin can eliminate this potential problem.
Negative Output Voltage Setting
Negative output voltage can be sensed using the NFB pin.
In this case regulation will occur when the NFB pin is at
鈥?2.5V. The input bias current for the NFB pin is 鈥?5碌A(chǔ)
(I
NFB
) and must be accounted for when selecting divider
resistor values.
R1
NFB PIN
I
NFB
R2
1534 F02
鈥揤
OUT
Figure 3
Referring to Figure 3, R1 is chosen such that:
R1
=
R2 鈥?/div>
V
OUT
鈭?/div>
2.5
2.5
+
R2 鈥?25
碌
A
A suggested value for R2 is 2.5k. The NFB pin is normally
left open if the FB pin is being used.
Dual Polarity Output Voltage Sensing
Certain applications may benefit from sensing both posi-
tive and negative output voltages. When doing this each
output voltage resistor divider is individually set as previ-
ously described. When both FB and NFB pins are used, the
LT1534 will act to prevent either output from going
beyond its set output voltage. The highest output (lightest
load) will dominate control of the regulator. This technique
would prevent either output from going unregulated high
at no load. However, this technique will also compromise
output load regulation.
Shutdown
If the shutdown pin is pulled low, the regulator will turn off.
The supply current will be reduced to less than 20碌A(chǔ).
10
U
W
U
U
Thermal Considerations
Computing power dissipation for this IC requires careful
attention to detail. Reduced output slewing causes the part
to dissipate more power than would occur with fast edges.
However, much improvement in noise can be produced
with modest decrease in supply efficiency.
Power dissipation is a function of topology, input voltage,
switch current and slew rates. It is impractical to come up
with an all-encompassing formula. It is therefore recom-
mended that package temperature be measured in each
application. The part has an internal thermal shutdown to
prevent device destruction, but this should not replace
careful thermal design.
1. Dissipation due to input current:
錚?/div>
I
錚?/div>
P
VIN
=
V
IN
錚?/div>
11mA
+ 錚?/div>
60
錚?/div>
錚?/div>
where I is the average switch current.
2. Dissipation due to the driver saturation:
P
VSAT
= (V
SAT
)(I)(DC
MAX
)
where V
SAT
is the output saturation voltage which is
approximately 0.1 + (0.2)(I), DC
MAX
is the maximum
duty cycle.
3. Dissipation due to output slew using approximations
for slew rates:
錚?/div>
錚?/div>
2
錚?/div>
錚?/div>
錚?/div>
2
錚?/div>
2
錚?/div>
錚?/div>
V I
2
+ 鈭?/div>
I
錚?/div>
V
IN
鈭?/div>
V
SAT
錚?/div>
I
錚?/div>
錚?/div>
錚?/div>
IN
錚?/div>
4
錚?/div>
錚?/div>
錚?/div>
4
錚?/div>
錚?/div>
錚?/div>
錚?/div>
錚?/div>
P
SLEW
= 錚?/div>
R
CSL
+
R
VSL
錚?/div>
f
OSC
錚?/div>
錚?/div>
錚?/div>
10
9
錚?/div>
錚?/div>
10
9
錚?/div>
220
錚?/div>
錚?/div>
33
錚?錚?/div>
錚?錚?/div>
錚?/div>
錚?/div>
錚?/div>
錚?/div>
錚?/div>
錚?/div>
( )
( )
( )
()
( )
(
)( )
Note if V
SAT
and
鈭咺
are small with respect to V
IN
and I,
then:
錚?/div>
錚?/div>
V
IN
R
VSL
錚?/div>
I R
CSL
錚?/div>
P
SLEW
= 錚?/div>
+
f
V I
錚?/div>
10
9
錚?/div>
220
錚?/div>
10
9
錚?錚?/div>
OSC IN
錚?/div>
33
錚?錚?/div>
錚?錚革７
錚?/div>
錚?/div>
()( ) ( )(
( )
( )
) ( )( )()

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