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LT1508I Datasheet

  • LT1508I

  • Linear Technology [Power Factor and PWM Controller(Voltage ...

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LT1508
TYPICAL PERFORMANCE CHARACTERISTICS
R
SET
Voltage vs Current
120
100
80
60
40
20
0
鈥?0
鈥?0
鈥?0
鈥?0
鈥?00
0
鈥?.2
鈥?.4
鈥?.8
鈥?.6
R
SET
CURRENT (mA)
鈥?.0
1508 G12
PK
LIM
CURRENT (碌A(chǔ))
VR
SET
鈥?V
REF
(mV)
PIN FUNCTIONS
PFC SECTION
GTDR1 (Pin 1):
The PFC MOSFET gate driver is a fast
totem pole output which is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5鈩?will prevent the overshoot.
GND2 (Pin 2):
Power Ground. High current spikes occur
in this line when either GTDR1 or GTDR2 switches low.
GND1 (Pin 3):
Analog Ground.
C
SET
(Pin 4):
The capacitor from this pin to GND and R
SET
determines oscillator frequency. The oscillator ramp is 5V
and the frequency = 1.5/(R
SET
C
SET
).
PK
LIM
(Pin 5):
The threshold of the peak current limit
comparator is GND. To set current limit, a resistor divider
can be connected from V
REF
to the current sense resistor.
CA
OUT
(Pin 6):
This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CA
OUT
is low,
the modulator has zero duty cycle.
I
SENSE
(Pin 7):
This is the inverting input of the current
amplifier. This pin is clamped at 鈥?0.6V by an ESD protec-
tion diode.
M
OUT
(Pin 8):
This is the multiplier high impedance
current output and the noninverting input of the current
amplifier. This pin is clamped at 鈥?0.6V and 3V.
6
U W
PK
LIM
Pin Characteristics
鈥?60
T
J
= 125擄C
T
J
= 25擄C
T
J
= 鈥?5擄C
鈥?00
鈥?40
鈥?80
鈥?20
鈥?0
0
60
120
180
240
300
鈥?.8
鈥?.4
0.4
0
PK
LIM
VOLTAGE (V)
0.8
1508 G13
T
J
= 125擄C
T
J
= 25擄C
T
J
= 鈥?5擄C
U
U
U
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
I
AC
(Pin 9):
This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 25k resistor is in series with the
current input, so that a lowpass RC can be used to filter out
the switching noise coming down from the line with a high
line impedance environment.
VA
OUT
(Pin 10):
This is the output of the voltage error
amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.
OVP (Pin 11):
This is the input to the overvoltage com-
parator. The threshold is 1.05 times the reference voltage.
When the comparator trips, the multiplier, which is quickly
inhibited, blanks PFC switching to prevent further over-
shoot. This pin is also the input to the PWMOK comparator
that releases the PWM soft start (SS2) after the PFC output
gets close to the final voltage and has a hysteresis of
approximately 150V for 382V PFC output.
V
REF
(Pin 12):
This is the 7.5V reference. When V
CC
goes
low, V
REF
will stay at 0V. V
REF
biases most of the internal
circuitry and can source up to 5mA externally.
V
SENSE
(Pin 14):
This is the inverting input to the voltage
amplifier.

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