LC87F5LP6A
2. SIO1 Serial I/O Characteristics (Note 4-2-1)
Parameter
Frequency
Input clock
Low level
pulse width
High level
pulse width
Frequency
Output clock
Low level
pulse width
High level
pulse width
Data setup time
Serial input
tsDI(2)
SI1(P14),
SB1(P14)
Data hold time
thDI(2)
鈥?Must be specified with respect to
rising edge of SIOCLK
鈥?See fig. 6.
2.5 to 5.5
0.03
Output delay
Serial output
time
tdD0(4)
SO1(P13),
SB1(P14)
鈥?Must be specified with respect to
falling edge of SIOCLK
鈥?Must be specified as the time to
the beginning of output state
change in open drain output mode.
鈥?See Fig. 6.
2.5 to 5.5
(1/3)tCYC
+0.05
碌s
0.03
tSCKH(4)
tSCK(4)
tSCKL(4)
SCK1(P15)
鈥?CMOS output selected.
鈥?See Fig. 6.
2.5 to 5.5
tSCKH(3)
Symbol
Tsck(3)
tSCKL(3)
Pins/
Remarks
SCK1(P15)
鈥?See Fig. 6.
Conditions
VDD[V]
min
2
2.5 to 5.5
1
tCYC
1
2
1/2
tSCK
1/2
Specification
typ
max
unit
Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.
Serial clock
No.A0664-18/28