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AD7934-6 Datasheet

  • AD7934-6

  • 4-Channel, 625 kSPS, 12-Bit Parallel ADC with a Sequencer

  • 30頁

  • AD

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AD7934-6
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
DD 1
W/B
DB0
DB1
DB2
DB3
DB4
DB5
2
3
4
5
6
7
8
28
V
IN
3
27
V
IN
2
26
V
IN
1
AD7934-6
TOP VIEW
(Not to Scale)
25
V
IN
0
24
V
REFIN
/V
REFOUT
23
AGND
22
CS
21
RD
20
WR
19
CONVST
18
DB6
9
DB7
10
V
DRIVE 11
DGND
12
DB8/HBEN
13
DB9
14
CLKIN
DB11
DB10
17
BUSY
04752-006
16
15
Figure 2. Pin Configuration
Table 5. Pin Function Description
Pin No.
1
2
Mnemonic
V
DD
W/B
Description
Power Supply Input. The V
DD
range for the AD7934-6 is from 2.7 V to 5.25 V. The supply should be decoupled
to AGND with a 0.1 碌F capacitor and a 10 碌F tantalum capacitor.
Word/Byte Input. When this input is logic high, word transfer mode is enabled, and data is transferred to and
from the AD7934-6 in 12-bit words on Pin DB0 to Pin DB11. When W/B is logic low, byte transfer mode is
enabled. Data and the channel ID are transferred on Pin DB0 to Pin DB7, and Pin DB8/HBEN assumes its HBEN
functionality. When operating in byte transfer mode, unused data lines should be tied off to DGND.
Data Bits 0 to 7. Three-state parallel digital I/O pins that provide the conversion result, and allow the control
register to be programmed. These pins are controlled by CS, RD, and WR. The logic high/low voltage levels for
these pins are determined by the V
DRIVE
input.
Logic Power Supply Input. The voltage supplied at this pin determines what voltage the parallel interface of
the AD7934-6 operates. This pin should be decoupled to DGND. The voltage at this pin can be different to that
at V
DD
, but should never exceed V
DD
by more than 0.3 V.
Digital Ground. This is the ground reference point for all digital circuitry on the AD7934-6. This pin should
connect to the DGND plane of a system. The DGND and AGND voltages should ideally be at the same
potential, and must not be more than 0.3 V apart, even on a transient basis.
Data Bit 8/High Byte Enable. When W/B is high, this pin acts as Data Bit 8, a three-state I/O pin that is
controlled by CS, RD, and WR. When W/B is low, this pin acts as the high byte enable pin. When HBEN is low,
the low byte of data written to or read from the AD7934-6 is on DB0 to DB7. When HBEN is high, the top four
bits of the data being written to or read from the AD7934-6 are on DB0 to DB3. When reading from the device,
DB4 and DB5 of the high byte contain the ID of the channel corresponding to the conversion result (see the
channel address bits in Table 9). DB6 and DB7 are always 0. When writing to the device, DB4 to DB7 of the high
byte must all be 0s.
Data Bits 9 to 11. Three-state parallel digital I/O pins that provide the conversion result and allow the control
register to be programmed in word mode. These pins are controlled by CS, RD, and WR. The logic high/low
voltage levels for these pins are determined by the V
DRIVE
input.
Busy Output. Logic output indicating the status of the conversion. The BUSY output goes high following the
falling edge of CONVST and stays high for the duration of the conversion. Once the conversion is complete
and the result is available in the output register, the BUSY output goes low. The track-and-hold returns to track
mode just prior to the falling edge of BUSY, on the 13
th
rising edge of SCLK (see Figure 34).
Master Clock Input. The clock source for the conversion process is applied to this pin. Conversion time for the
AD7934-6 takes 13 clock cycles + t
2
. The frequency of the master clock input therefore determines the
conversion time and achievable throughput rate. The CLKIN signal can be a continuous or burst clock.
Conversion Start Input. A falling edge on CONVST is used to initiate a conversion. The track-and-hold goes
from track to hold mode on the falling edge of CONVST, and the conversion process is initiated at this point.
Following power-down, when operating in the autoshutdown or autostandby mode, a rising edge on
CONVST is used to power up the device.
Write Input. Active low logic input used in conjunction with CS to write data to the control register.
3 to 10
DB0 to DB7
11
V
DRIVE
12
DGND
13
DB8/HBEN
14 to 16
DB9 to DB11
17
BUSY
18
CLKIN
19
CONVST
20
WR
Rev. A | Page 7 of 28

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