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AD7934-6 Datasheet

  • AD7934-6

  • 4-Channel, 625 kSPS, 12-Bit Parallel ADC with a Sequencer

  • 30頁

  • AD

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AD7934-6
PARALLEL INTERFACE
The AD7934-6 has a flexible, high speed, parallel interface. This
interface is 12-bits wide and is capable of operating in either
word (W/B tied high) or byte (W/B tied low) mode. The
CONVST signal is used to initiate conversions, and when
operating in autoshutdown or autostandby mode, it is used to
initiate power up.
A falling edge on the CONVST signal is used to initiate conver-
sions, and it also puts the ADC track-and-hold into track. Once
the CONVST signal goes low, the BUSY signal goes high for the
duration of the conversion. Between conversions, CONVST must
be brought high for a minimum time of t
1
. This must occur after
the 14
th
falling edge of CLKIN; otherwise, the conversion is
aborted and the track-and-hold goes back into track.
At the end of the conversion, BUSY goes low and can be used to
activate an interrupt service routine. The CS and RD lines are
then activated in parallel to read the 12 bits of conversion data.
When power supplies are first applied to the device, a rising
edge on CONVST is necessary to put the track-and-hold into
track. The acquisition time of 125 ns minimum must be allowed
before CONVST is brought low to initiate a conversion. The
ADC then goes into hold on the falling edge of CONVST, and
back into track on the 13
th
rising edge of CLKIN (see Figure 34).
When operating the device in autoshutdown or autostandby
mode, where the ADC powers down at the end of each
conversion, a rising edge on the CONVST signal is used to
power up the device.
B
A
CONVST
t
1
t
CONVERT
1
CLKIN
2
3
4
5
12
13
14
t
2
t
20
t
3
BUSY
t
9
INTERNAL
TRACK/HOLD
t
AQUISITION
CS
RD
t
10
t
13
t
12
t
11
t
14
DB0 TO DB11
THREE-STATE
DATA
THREE-STATE
t
QUIET
WITH CS AND RD TIED LOW
DB0 TO DB11
OLD DATA
DATA
04752-004
Figure 34. AD7934-6 Parallel Interface鈥擟onversion and Read Cycle in Word Mode (W/B = 1)
Rev. A | Page 21 of 28

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