mode. In single-ended mode, V
IN鈭?/div>
is internally tied to AGND.
The four diodes provide ESD protection for the analog inputs.
Care must be taken to ensure that the analog input signals never
exceed the supply rails by more than 300 mV. This causes the
diodes to become forward-biased and start conducting into the
substrate. These diodes can conduct up to 10 mA without
causing irreversible damage to the part.
ADC CODE
000...001
000...000
111...111
100...010
100...001
100...000
鈥揤
REF
+ 1 LSB
V
REF
+V
REF
鈥?1 LSB
04752-026
Figure 17. Ideal Transfer Characteristic
with Twos Complement Output Coding and 2 x V
REF
Range
TYPICAL CONNECTION DIAGRAM
Figure 18 shows a typical connection diagram for the
AD7934-6. The AGND and DGND pins are connected
together at the device for good noise suppression. The
V
REFIN
/V
REFOUT
pin is decoupled to AGND with a 0.47 碌F
capacitor to avoid noise pickup if the internal reference is
used. Alternatively, V
REFIN
/V
REFOUT
can be connected to an
external reference source. In this case, the reference pin
should be decoupled with a 0.1 碌F capacitor. In both cases, the
analog input range can either be 0 V to V
REF
(RANGE bit = 0)
or 0 V to 2 脳 V
REF
(RANGE bit = 1). The analog input configu-
ration is either four single-ended inputs, two differential pairs
or two pseudo differential pairs (see Table 9). The V
DD
pin
connects to either a 3 V or 5 V supply. The voltage applied to
the V
DRIVE
input controls the voltage of the digital interface.
Here in Figure 18 it is connected to the same 3 V supply of the
microprocessor to allow a 3 V logic interface (see the Digital
Inputs section).
0.1碌F
10碌F
3V/5V
SUPPLY
The C1 capacitors in Figure 19 are typically 4 pF, and can
primarily be attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about 100 鈩?
The C2 capacitors are the sampling capacitors of the ADC and
typically have a capacitance of 45 pF.
V
DD
D
V
IN
+
C1
D
R1
C2
V
DD
D
V
IN
鈥?/div>
04752-028
R1
C2
C1
D
Figure 19. Equivalent Analog Input Circuit,
Conversion Phase鈥擲witches Open, Track Phase鈥擲witches Closed
V
DD
AD7934-6
W/B
CLKIN
CS
RD
V
IN
0
0 TO V
REF
/
0 TO 2
脳
V
REF
For ac applications, removing high frequency components from
the analog input signal is recommended by the use of an RC low-
pass filter on the relevant analog input pins. In applications where
harmonic distortion and signal-to-noise ratio are critical, the
analog input should be driven from a low impedance source.
Large source impedances significantly affect the ac performance
of the ADC. This can necessitate the use of an input buffer
amplifier. The choice of the op amp is a function of the
particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance depends on the amount of THD that can be
tolerated. The THD increases as the source impedance increases
and performance degrades. Figure 20 and Figure 21 show a
graph of the THD vs. source impedance with a 50 kHz input
tone for both V
DD
= 5 V and 3 V, in single-ended mode and
differential mode, respectively.
V
IN
3
WR
BUSY
CONVST
碌C/碌P
AGND
DGND
V
REFIN
/V
REFOUT
2.5V
V
REF
DB0
DB11/DB9
V
DRIVE
0.1碌F
10碌F
3V
SUPPLY
0.1碌F EXTERNAL V
REF
0.47碌F INTERNAL V
REF
Figure 18. Typical Connection Diagram
Rev. A | Page 16 of 28
04752-027
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