Figure 26. Single Word I
鈥?/div>
P
Figure 27. Burst Mode I
2
C Read Format
S - Start Bit
P - Stop Bit
AM - Acknowledge by Master
AS - Acknowledge by Slave
CLATCH
CCLK
04607-0-006
CDATA
BYTE 0
BYTE 1
BYTE 2
BYTE 3
Figure 28. SPI Write Clocking (Single-Write Mode)
CLATCH
CCLK
CDATA
BYTE 0
BYTE 1
04607-0-007
COUT
HI-Z
DATA
DATA
DATA
HI-Z
Figure 29. SPI Read Clocking (Single-Read Mode)
Table 18. Control Port/Selfboot Pin Functions
Pin
SCL/CCLK
SDA/COUT
ADDR1/CDATA/WB
CLATCH/WP
ADDR0
I
2
C Mode
SCL - input
SDA 鈥?open collector output
ADDR1 - input
Unused input 鈥?tie to ground or VDD
ADDR0 - input
SPI Mode
CCLK - input
COUT 鈥?output
CDATA - input
CLATCH - input
ADDR0 - input
Selfboot
SCL - output
SDA 鈥?open collector output
Writeback trigger
EEPROM Write Protect - open collector output
unused input 鈥?tie to ground or VDD
Rev. PrF | Page 22 of 43