Preliminary Technical Data
TWO-CHANNEL AUDIO ADC
The ADAU1701 has a two-channel 危-螖 ADC. The SNR of the
ADCs is 100 dB and the THD+N is -80 dB.
The stereo audio ADCs are current-input, so a voltage-to-
current resistor is required on the inputs. This means that the
voltage level of the input signals to the system can be set to any
level; only the input resistors need to scale to provide the proper
full-scale current input. The input pins ADC0 and ADC1, as
well as ADC_RES have an internal 2 k惟 resistor for ESD
performance. The external resistor connected to ADC_RES sets
the full-scale current input of the ADCs. The full range of the
ADC inputs is 100 渭Arms and this setting is given with an
external 18 k惟 resistor (20 k惟 total, because it is in series with
the internal 2 k惟). The voltage seen directly on the ADC input
pins will be the 1.5 V common mode.
The voltage-to-current resistors connected to ADC0/1 set the
full-scale voltage input to the ADCs. With a full-scale current
input of 100 渭Arms, a 2.0 Vrms signal with an external 18 k惟
resistor (in series with the 2 k惟 internal resistor) will give an
input using the full range of the ADC. There should not be any
need in an application to reduce the ADC鈥檚 full-scale input by
increasing the value of the resistor on ADC_RES.
Either input pins ADC0 and/or ADC1 can be left unconnected
if that channel of the ADC is unused.
These calculations of resistor values all assume a 48 kHz sample
rate. The recommended input and current setting resistors will
ADAU1701
scale directly with the sample rate because the ADCs have a
switched-capacitor input. The total value (2 k惟 internal plus
external resistor) of the ADC_RES resistor with sample rate
f
s_new
can be calculated by:
R
total
=
20
k
惟 脳
48000
f
s
_
new
The values of the resistors on the ADCx inputs can be
calculated by:
R
input
_
total
=
(
rms
_
input
_
voltage
)
脳
10
k
惟 脳
48000
f
s
_
new
Figure 19 shows a typical configuration of the ADC inputs for a
2.0 Vrms input signal. The 47 渭F capacitors are used to ac-
couple the signals so that the inputs are biased at 1.5 V.
ADAU1701
47 uF
18 k惟
ADC0
47 uF
18 k惟
ADC1
18 k惟
ADC_RE
Figure 19. Audio ADC input schematic
Rev. PrF | Page 17 of 43