ADAU1702 Datasheet

IC型號：
ADAU1702
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SigmaDSP? 28/56-Bit Audio Processor with 2ADC/4DAC
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ADAU1702

2080 TO 2081 (0x0820 TO 0x0821)鈥擬ULTIPURPOSE PIN CONFIGURATION REGISTERS

Each multipurpose pin can be set to different functions from

these registers (2080 to 2081). The two 3-byte registers are

broken up into 12 4-bit (nibble) sections that each control a

different MP pin. Table 54 lists the function of each nibble

setting within the MP pin configuration registers. The MSB of

Table 52. Register 2080

D15

MP33

D14

MP32

D13

MP31

D12

MP30

D11

MP23

D10

MP22

MP21

MP20

D23

MP53

MP13

D22

MP52

MP12

D21

MP51

MP11

D20

MP50

MP10

D19

MP43

MP03

D18

MP42

MP02

D17

MP41

MP01

D16

MP40

MP00

Default

0x00

0x0000

each pin鈥檚 4-bit configuration inverts the input to or output

from the pin. The internal pull-up resistor (approximately

10 k惟) of each MP pin is enabled when it is set as a digital input

(either a GPIO input or a serial data port input).

Table 53. Register 2081

D15

MP93

D14

MP92

D13

MP91

D12

MP90

D11

MP83

D10

MP82

MP81

MP80

D23

MP113

MP73

D22

MP112

MP72

D21

MP111

MP71

D20

MP110

MP70

D19

MP103

MP63

D18

MP102

MP62

D17

MP101

MP61

D16

MP100

MP60

Default

0x00

0x0000

Table 54.

Bit Name

MPx [3:0]

Description

Set the function of each multipurpose pin

MPx [3:0]

Setting

1111

Auxiliary ADC input (see Table 63)

1110

Reserved

1101

Reserved

1100

Serial data port鈥攊nverted (see Table 65)

1011

Open-collector output鈥攊nverted

1010

GPIO output鈥攊nverted

1001

GPIO input, no debounce鈥攊nverted

1000

GPIO input, debounced鈥攊nverted

0111

N/A

0110

Reserved

0101

Reserved

0100

Serial data port (see Table 65)

0011

Open-collector output

0010

GPIO output

0001

GPIO input, no debounce

0000

GPIO input, debounced

Rev. 0 | Page 41 of 52

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