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ADAU1702 Datasheet

  • ADAU1702

  • SigmaDSP? 28/56-Bit Audio Processor with 2ADC/4DAC

  • 38頁

  • AD

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ADAU1702
SPECIFICATIONS
AVDD = 3.3 V, DVDD = 1.8 V, PVDD = 3.3 V, IOVDD = 3.3 V, ambient temperature 25擄 C, master clock input 12.288 MHz, unless
otherwise noted .
ANALOG PERFORMANCE
Table 1.
Parameter
ADC INPUTS
Number of Channels
Resolution
Full-Scale Input
Signal-to-Noise Ratio
A-Weighted
Dynamic Range
A-Weighted
Total Harmonic Distortion + Noise
Interchannel Gain Mismatch
Crosstalk
DC Bias
Gain Error
DAC OUTPUTS
Number of Channels
Resolution
Full-Scale Analog Output
Signal-to-Noise Ratio
A-Weighted
Dynamic Range
A-Weighted
Total Harmonic Distortion + Noise
Crosstalk
Interchannel Gain Mismatch
Gain Error
DC Bias
VOLTAGE REFERENCE
Absolute Voltage (CM, FILTA, FILTD)
AUXILIARY ADC
Full-Scale Analog Input
INL
DNL
Offset
Input Impedance
Min
Typ
2
24
100 (283)
Max
Unit
Test Conditions/Comments
Stereo input
Bits
渭A
rms
(渭A
p-p
)
2 V
rms
input with 20 k惟 (18 k惟 external + 2 k惟
internal) series resistor
100
95
100
鈭?3
25
鈭?2
1.5
dB
鈭?0 dB with respect to full-scale analog input
dB
dB
mdB
dB
V
%
鈭? dB with respect to full-scale analog input
Analog channel-to-channel crosstalk
250
鈭?1
4
24
0.9 (2.5)
104
99
104
鈭?0
鈭?00
25
1.5
1.5
3.0
0.5
1.0
15
30
+11
Two stereo output channels
Bits
V
rms
(V
P-P
)
dB
鈭?0 dB with respect to full-scale analog output
dB
dB
dB
mdB
%
V
V
V
LSB
LSB
mV
k惟
鈭? dB with respect to full-scale analog output
Analog channel-to-channel crosstalk
鈭?0
250
+10
Rev. 0 | Page 3 of 52

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