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ADG836 Datasheet

  • ADG836

  • 0.5 Ω CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUX

  • 17頁

  • AD

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ADG836
SPECIFICATIONS
1
(V
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On Resistance Match between
Channels (顏凴
ON
)
On Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage I
S
(OFF)
Channel On Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-before-Make Time Delay (t
BBM
)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
DD
= 2.5 V 鹵 0.2 V, GND = 0 V, unless otherwise noted.)
+25
顎?/div>
C
鈥?0
顎?/div>
C
to +85
顎?/div>
C
鈥?0
顎?/div>
C
to +125
顎?/div>
C
0 V to V
DD
0.8
0.08
0.16
0.23
鹵0.2
鹵0.4
鹵0.2
鹵0.6
0.24
0.88
0.085
Unit
V
Test Conditions/Comments
0.65
0.72
0.04
顏?/div>
typ
顏?/div>
max
顏?/div>
typ
顏?/div>
max
顏?/div>
typ
顏?/div>
max
nA typ
nA max
nA typ
nA max
V min
V max
碌A typ
碌A max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
V
DD
= 2.3 V, V
S
= 0 V to V
DD
,
I
S
= 10 mA; Test Circuit 1
V
DD
= 2.3 V, V
S
= 0.7 V;
I
S
= 10 mA
V
DD
= 2.3 V, V
S
= 0 V to V
DD
,
I
S
= 10 mA
V
DD
= 2.7 V
V
S
= 0.6 V/2.4 V, V
D
= 2.4 V/0.6 V;
Test Circuit 2
V
S
= V
D
= 0.6 V or 2.4 V; Test Circuit 3
鹵4
鹵12
鹵45
鹵90
1.7
0.7
0.005
鹵0.1
4
23
29
5
7
17
30
鈥?7
鈥?0
V
IN
= V
INL
or V
INH
30
8
31
9
5
鈥?7
dB typ
Total Harmonic Distortion (THD + N)
Insertion Loss
鈥? dB Bandwidth
C
S
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
0.022
鈥?.06
57
25
75
0.003
1.0
4.0
%
dB typ
MHz typ
pF typ
pF typ
碌A typ
碌A max
R
L
= 50
顏?/div>
, C
L
= 35 pF
V
S
= 1.5 V/0 V; Test Circuit 4
R
L
= 50
顏?/div>
, C
L
= 35 pF
V
S
= 1.5 V; Test Circuit 4
R
L
= 50
顏?/div>
, C
L
= 35 pF
V
S1
= V
S2
= 1.5 V; Test Circuit 5
V
S
= 1.25 V, R
S
= 0
顏?/div>
, C
L
= 1 nF;
Test Circuit 6
R
L
= 50
顏?/div>
, C
L
= 5 pF, f = 100 kHz;
Test Circuit 7
S1A鈥揝2A/S1B鈥揝2B;
R
L
= 50
顏?/div>
, C
L
= 5 pF, f = 100 kHz;
Test Circuit 10
S1A鈥揝1B/S2A鈥揝2B;
R
L
= 50
顏?/div>
, C
L
= 5 pF, f = 100 kHz;
Test Circuit 9
R
L
= 32
顏?/div>
, f = 20 Hz to 20 kHz,
V
S
= 1.5 V p-p
R
L
= 50
顏?/div>
, C
L
= 5 pF; Test Circuit 8
R
L
= 50
顏?/div>
, C
L
= 5 pF; Test Circuit 8
V
DD
= 2.7 V
Digital Inputs = 0 V or 2.7 V
NOTES
1
Temperature range is as follows: Y version: 鈥?0擄C to +125擄C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0
鈥?鈥?/div>

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