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ADM3483 Datasheet

  • ADM3483

  • 3.3 V Slew Rate Limited, Half and Full Duplex,RS-485/RS-422 ...

  • 785.98KB

  • 17頁

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ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
SPECIFICATIONS
V
CC
= 3.3 V 鹵 0.3 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Voltage (V
OD
)
Min
2.0
1.5
1.5
0.2
3
0.2
0.8
2.0
鹵2
1.0
鈭?.8
0.1
鈭?.1
Output Leakage (Y, Z) in Shutdown Mode (I
O
)
0.01
鈭?.01
RECEIVER
Differential Input Threshold Voltage (V
TH
)
Input Hysteresis (螖 V
TH
)
CMOS Output Voltage High (V
OH
)
CMOS Output Voltage Low (V
OL
)
Three-State Output Leakage Current (I
OZR
)
Input Resistance (R
IN
)
POWER SUPPLY CURRENT
Supply Current (I
CC
)
Supply Current in Shutdown Mode (I
SHDN
)
Driver Short-Circuit Output Current (I
OSD
)
Receiver Short-Circuit Output Current (I
OSR
)
1
Typ
Max
Unit
V
V
V
V
V
V
V
V
渭A
mA
mA
渭A
渭A
渭A
渭A
Test Conditions/Comments
R
L
= 100 惟 (RS-422), V
CC
= 3.3 V 鹵 5% (see Figure 7)
R
L
= 54 惟 (RS-485) (see Figure 7)
R
L
= 60 惟 (RS-485), V
CC
= 3.3 V (see Figure 8)
R
L
= 54 惟 or 100 惟 (see Figure 7)
R
L
= 54 惟 or 100 惟 (see Figure 7)
R
L
= 54 惟 or 100 惟 (see Figure 7)
DE, DI, RE
DE, DI, RE
DE, DI, RE
V
IN
= 12 V, DE = 0 V, V
CC
= 0 V or 3.6 V
V
IN
= 鈭? V, DE = 0 V, V
CC
= 0 V or 3.6 V
V
IN
= 12 V, DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= 鈭? V, DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= 12 V, DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= 鈭? V, DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
ADM3491 only
鈭? V < V
CM
< +12 V
V
CM
= 0 V
I
OUT
= 鈭?.5 mA, V
ID
= 200 mV (see Figure 9)
I
OUT
= 2.5 mA, V
ID
= 200 mV (see Figure 9)
V
CC
= 3.6 V, 0 V 鈮?V
OUT
鈮?V
CC
鈭? V < V
CM
< +12 V
DE = V
CC
, RE = 0 V or V
CC
, no load, DI = 0 V or V
CC
DE = 0 V, RE = 0 V, no load, DI = 0 V or V
CC
DE = 0 V, RE = V
CC
, DI = V
CC
or 0 V
V
OUT
= 鈭? V
V
OUT
= 12 V
0 V < V
RO
< V
CC
螖 |V
OD
| for Complementary Output States
1
Common-Mode Output Voltage (V
OC
)
螖 |V
OC
| for Common-Mode Output Voltage
1
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low (V
IH
)
CMOS Input Logic Threshold High (V
IL
)
CMOS Logic Input Current (I
IN1
)
Input Current鈥擜, B (I
IN2
)
Output Leakage鈥擸, Z (I
O
)
鈭?.2
50
V
CC
鈥?0.4
+0.2
0.4
鹵1
12
1.1
0.95
0.002
2.2
1.9
1
鈭?50
250
鹵60
V
mV
V
V
渭A
k惟
mA
mA
渭A
mA
mA
mA
鹵8
螖V
OD
and
螖V
OC
are the changes in V
OD
and V
OC
, respectively, when DI input changes state.
Rev. B | Page 4 of 20

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