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TPS40055 Datasheet

  • TPS40055

  • 寬輸入 (8V-40V) 最高頻率 1MHz 的同步降壓控制器,具有輸出驅動...

  • 634.57KB

  • 34頁

  • TI

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SLUS593B 鈭?DECEMBER 2003 鈭?REVISED APRIL 2004
TPS40054
TPS40055
TPS40057
LAYOUT CONSIDERATIONS
GROUNDING AND CIRCUIT LAYOUT CONSIDERATIONS
The TPS4005x provides separate signal ground (SGND) and power ground (PGND) pins. It is important that
circuit grounds are properly separated. Each ground should consist of a plane to minimize its impedance if
possible. The high power
noisy
circuits such as the output, synchronous rectifier, MOSFET driver decoupling
capacitor (BP10), and the input capacitor should be connected to PGND plane at the input capacitor.
Sensitive nodes such as the FB resistor divider, R
T
, and ILIM should be connected to the SGND plane. The
SGND plane should only make a single point connection to the PGND plane.
Component placement should ensure that bypass capacitors (BP10 and BP5) are located as close as possible
to their respective power and ground pins. Also, sensitive circuits such as FB, RT and ILIM should not be located
near high dv/dt nodes such as HDRV, LDRV, BOOST, and the switch node (SW).
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