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TPS40055 Datasheet

  • TPS40055

  • 寬輸入 (8V-40V) 最高頻率 1MHz 的同步降壓控制器，具有輸出驅(qū)動(dòng)...

  • 34頁

  • TI

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SLUS593B 鈭?DECEMBER 2003 鈭?REVISED APRIL 2004
TPS40054
TPS40055
TPS40057
APPLICATION INFORMATION
PROGRAMMING SOFT START
TPS4005x uses a closed-loop approach to ensure a controlled ramp on the output during start-up. Soft-start
is programmed by charging an external capacitor (C
SS
) via an internally generated current source. The voltage
on C
SS
minus 0.85 V is fed into a separate non-inverting input to the error amplifier (in addition to FB and
0.7-V VREF). The loop is closed on the lower of the (C
SS
鈭?0.85 V) voltage or the internal reference voltage
(0.7-V VREF). Once the (C
SS
鈭?0.85 V) voltage rises above the internal reference voltage, regulation is based
on the internal reference. To ensure a controlled ramp-up of the output voltage the soft-start time should be
greater than the L-C
O
time constant as described in equation (13).
t
START
w
2p
L
C
O
(seconds)
(13)
There is a direct correlation between t
START
and the input current required during start-up. The faster t
START
,
the higher the input current required during start-up. This relationship is describe in more detail in the section
titled,
Programming the Current Limit
which follows. The soft-start capacitance, C
SS
, is described in
equation (14).
For applications in which the V
IN
supply ramps up slowly, (typically between 50 ms and 100 ms) it may be
necessary to increase the soft-start time to between approximately 2 ms and 5 ms to prevent nuisance UVLO
tripping. The soft-start time should be longer than the time that the V
IN
supply transitions between 6 V and 7 V.
C
SS
+
2.3
mA
0.7 V
t
START
(Farads)
(14)
PROGRAMMING CURRENT LIMIT
The TPS4005x uses a two-tier approach for overcurrent protection. The first tier is a pulse-by-pulse protection
scheme. Current limit is implemented on the high-side MOSFET by sensing the voltage drop across the
MOSFET when the gate is driven high. The MOSFET voltage is compared to the voltage dropped across a
resistor connected from VIN pin to the ILIM pin when driven by a constant current sink. If the voltage drop across
the MOSFET exceeds the voltage drop across the ILIM resistor, the switching pulse is immediately terminated.
The MOSFET remains off until the next switching cycle is initiated.
The second tier consists of a fault counter. The fault counter is incremented on an overcurrent pulse and
decremented on a clock cycle without an overcurrent pulse. When the counter reaches seven (7) a restart is
issued and seven soft-start cycles are initiated. Both the upper and lower MOSFETs are turned off during this
period. The counter is decremented on each soft-start cycle. When the counter is decremented to zero, the
PWM is re-enabled. If the fault has been removed the output starts up normally. If the output is still present the
counter counts seven overcurrent pulses and re-enters the second-tier fault mode. See Figure 6 for typical
overcurrent protection waveforms.
www.ti.com
15

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