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TPS40055 Datasheet

  • TPS40055

  • 寬輸入 (8V-40V) 最高頻率 1MHz 的同步降壓控制器，具有輸出驅(qū)動(dòng)...

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  • TI

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SLUS593B 鈭?DECEMBER 2003 鈭?REVISED APRIL 2004
TPS40054
TPS40055
TPS40057
SWITCHING FREQUENCY
vs
TIMING RESISTANCE
600
RKFF 鈭?Feed-Forward Impedance 鈭?k鈩?/div>
700
600
FEED-FORWARD IMPEDANCE
vs
SWITCHING FREQUENCY
500
RT 鈭?Timing Resistance 鈭?k鈩?/div>
500
400
400
300
VIN = 9 V
300
VIN = 15 V
200
200
VIN = 25 V
100
100
0
100
0
100
200
300
400
500
600
700
800
900 1000
200
300 400
500
600
700
800
900 1000
fSW 鈭?Switching Frequency 鈭?kHz
fSW 鈭?Switching Frequency 鈭?kHz
Figure 2
Figure 3
UVLO OPERATION
The TPS4005x uses variable (user programmable) UVLO protection. The UVLO circuit holds the soft-start low
until the input voltage has exceeded the user programmable undervoltage threshold.
The TPS4005x uses the feed-forward pin, KFF, as a user programmable low-line UVLO detection. This variable
low-line UVLO threshold compares the PWM ramp duration to the oscillator clock period. An undervoltage
condition exists if the TPS4005x receives a clock pulse before the ramp has reached 90% of its full amplitude.
The ramp duration is a function of the ramp slope, which is directly related to the current into the KFF pin. The
KFF current is a function of the input voltage and the resistance from KFF to the input voltage. The KFF resistor
can be referenced to the oscillator frequency as descibed in equation (3):
R
KFF
+
V
IN (min)
*
3.5
where:.
58.14
R
T
)
1340
W
(3)
D
V
IN
is the desired start-up (UVLO) input voltage
D
R
T
is the timing resistance in k鈩?/div>
The variable UVLO function uses a three鈭抌it full adder to prevent spurious shut-downs or turn-ons due to spikes
or fast line transients. When the adder reaches a total of seven counts in which the ramp duration is shorter than
the clock cycle a powergood signal is asserted and a soft-start initiated, and the upper and lower MOSFETS
are turned off.
10
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