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TPS40074 Datasheet

  • TPS40074

  • 具有電壓前饋的中等范圍輸入同步降壓控制器

  • 38頁

  • TI

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TPS40074
SLUS617 鈥?APRIL 2005
www.ti.com
APPLICATION INFORMATION (continued)
In addition, just prior to the high-side MOSFET turning on, the ILIM pin is pulled down to approximately half of
VDD. The ILIM pin is allowed to return to its nominal value after one of two events occur:
1. The SW node rises to within approximately 2 V of VDD
2. An internal timeout occurs, approximately 125-ns after ILIM is initially pulled down
If the SW node rises to within approximately 2-V of VDD, the device allows ILIM to go back to its nominal value.
This is illustrated in
Figure 10
A. T1 is the delay time from the internal PWM signal being asserted and the rise of
SW. This includes the driver delay of 50 ns typical, and the turn on time of the high-side MOSFET. The MOSFET
used should have a turn on time less than 75 ns. T2 is the reaction time of the sensing circuit that allows ILIM to
start to return to its nominal value, typically 20ns.
The second event that can cause ILIM to return to its nominal value is for an internal timeout to expire. This is
illustrated in
Figure 10
B as T3. Here SW never rises to VDD-2, for whatever reason, and the internal timer times
out. This allows the ILIM pin to start its transition back to its nominal value.
Prior to ILIM starting back to its nominal value, short circuit sensing is not enabled. In normal operation, this
insures that the SW node is at a higher voltage than ILIM when short circuit sensing starts, avoiding false trips
while allowing for a quicker blanking delay than would ordinarily be possible. Placing a capacitor across R
ILIM
sets an exponential approach to the normal voltage at the ILIM pin. This exponential 鈥渄ecay鈥?of the short circuit
threshold can be used to compensate for ringing on the SW node after its rising edge and to help compensate
for slower turn-on MOSFETs. Choosing the proper capacitance requires care. If the capacitance is too large, the
voltage at ILIM does not approach the desired short circuit level quickly enough, resulting in an apparent shift in
short circuit threshold as pulse width changes.
The comparator that looks at ILIM and SW to determine if a short circuit condition exists has a clamp on its SW
input. This clamp makes the SW node never appear to fall more than 1.4 V (approximately, could be as much as
2 V at 鈥?40擄C) below VDD. While ILIM is more than 1.4 V below VDD short circuit sensing is effectively disabled,
giving a programmable absolute blanking time. As a general rule, it is best to make the time constant of the R-C
at the ILIM pin 20% or less of the nominal pulse width of the converter (See
Equation 11)
V
ILIM
Threshold
(A)
V
SW
I
ILIM
V
IN
鈭?/div>
2V
T2
T1
(B)
V
SW
I
ILIM
V
IN
鈭?/div>
2V
V
ILIM
Threshold
T1
T3
VDG鈭?3173
Figure 10. Voltage Feed-Forward and PWM Duty Cycle Waveforms
The second tier protection incorporates a fault counter. The fault counter is incremented on each cycle with an
overcurrent pulse and decremented on a clock cycle without an overcurrent pulse. When the counter reaches
seven (7) a fault condition is declared by the controller. When this happens, the output drivers turn both
14

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