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TPS40074 Datasheet

  • TPS40074

  • 具有電壓前饋的中等范圍輸入同步降壓控制器

  • 38頁(yè)

  • TI

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TPS40074
SLUS617 鈥?APRIL 2005
www.ti.com
APPLICATION INFORMATION (continued)
SWITCHING FREQUENCY
vs
TIMING RESISTANCE
520
515
510
505
500
495
490
485
480
0
200
400
600
800
1000
f
SW
鈭?/div>
Switching Frequency
鈭?/div>
kHz
600
TYPICAL SWITCHING FREQUENCY
vs
INPUT VOLTAGE
500
R
T
鈭?/div>
Timing Resistance
鈭?/div>
k鈩?/div>
f
OSC
鈭?/div>
Frequency
鈭?/div>
kHz
400
300
200
100
0
2
6
10
14
18
22
V
DD
鈭?/div>
Input Voltage
鈭?/div>
V
26
30
Figure 3.
Figure 4.
PROGRAMMING THE RAMP GENERATOR CIRCUIT AND UVLO FUNCTION
The ramp generator circuit provides the actual ramp used by the PWM comparator and provides voltage
feed-forward by varying the PWM ramp slope as the line voltage changes. As the input voltage to the converter
increases, the slope of the PWM ramp increase by a proportionate amount. The programmable UVLO circuit
works by monitoring the level reached by the PWM ramp during a clock cycle. The PWM ramp must reach
approximately 1 V in amplitude during a clock cycle, or the converter is not be allowed to start. This
programmable UVLO point is set via a single resistor (R
KFF
) connected from KFF to VDD. R
KFF
, V
START
and R
RT
are related by (approximately)
R
KFF
V
UVLO(on)
+
0.018 R
KFF
)
5
)
0.5
R
T
(4)
where
鈥?/div>
鈥?/div>
V
UVLO(on)
is in volts
R
KFF
and R
T
are in k鈩?/div>
This yields typical numbers for the programmed startup voltage. The minimum and maximum values may vary up
鹵15% from this number.
Figure 5
through
Figure 7
show the typical relationship of V
UVLO(on)
, V
UVLO(off)
and R
KFF
at
three common frequencies.
10

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