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DS1390 Datasheet

  • DS1390

  • Low-Voltage SPI/3-Wire RTCs with Trickle Charger

  • MAXIM   MAXIM

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Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
DS1390/DS1391/DS1392/DS1393
TRICKLE-CHARGE REGISTER (8Fh WRITE, 0Fh READ)
BIT 7
TCS3
BIT 6
TCS2
BIT 5
TCS1
BIT 4
TCS0
BIT 3
DS1
BIT 2
DS0
BIT 1
ROUT1
BIT 0
ROUT0
TCS
0-3
= TRICKLE-CHARGE SELECT
DS
0-1
= DIODE SELECT
ROUT
0-1
= RESISTOR SELECT
1 0F 16 SELECT
NOTE: ONLY 1010b ENABLES CHARGER
1 OF 2
SELECT
1 OF 3
SELECT
R1
250鈩?/div>
V
CC
R2
2k鈩?/div>
R3
4k鈩?/div>
V
BACKUP
Figure 9. DS1390/DS1391 Programmable Trickle Charger
Table 6. SPI Pin Function
CS
MODE
Disable
CSZ
H
SCLK
Input
Disabled
CPOL* = 1,
SCLK Rising
SDI
Input
Disabled
SDO
High
Impedance
DATA LATCH (WRITE/INTERNAL STROBE)
SHIFT DATA OUT (READ)
Write
L
CPOL = 0,
SCLK Falling
CPOL = 1,
SCLK Falling
Data Bit
Latch
High
Impedance
SCLK WHEN CPOL = 0
DATA LATCH (WRITE/INTERNAL STROBE)
SHIFT DATA OUT (READ)
SCLK WHEN CPOL = 1
Read
L
CPOL = 0,
SCLK Rising
X
Next Data
Bit Shift**
NOTE 1:
CPHA BIT POLARITY (IF APPLICABLE) MAY NEED TO BE SET ACCORDINGLY.
NOTE 2:
CPOL IS A BIT SET IN THE MICROCONTROLLER'S CONTROL REGISTER.
NOTE 3:
SDO REMAINS AT HIGH IMPEDANCE UNTIL 8 BITS OF DATA ARE READY TO BE
SHIFTED OUT DURING A READ.
*CPOL
is the clock-polarity bit set in the control register of the
host microprocessor.
**SDO
remains at high impedance until 8 bits of data are ready to
be shifted out during a read.
Figure 10. Serial Clock as a Function of Microcontroller Clock-
Polarity Bit
The user determines diode and resistor selection
according to the maximum current desired for battery
or super cap charging. The maximum charging current
can be calculated as illustrated in the following exam-
ple. Assume that a system power supply of 3.3V is
applied to V
CC
and a super cap is connected to
V
BACKUP
. Also, assume that the trickle charger has
been enabled with a diode and resistor R2 between
V
CC
and V
BACKUP
. The maximum current I
MAX
would
therefore be calculated as follows:
I
MAX
= (3.3V - diode drop) / R2
鈮?/div>
(3.3V - 0.7V) /
2k鈩?/div>
鈮?/div>
1.3mA
As the super cap changes, the voltage drop between
V
CC
and V
BACKUP
decreases and therefore the charge
current decreases.
18
____________________________________________________________________

DS1390 PDF文件相關(guān)型號

DS1390-DS1393,DS1390U-18,DS1390U-3,DS1391U-18,DS1391U-3,DS1392U-18,DS1392U-3,DS1393U-18,DS1393U-3

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